Datasheet

AD7776/AD7777/AD7778
8
REV. A
Microprocessor Interfacing Circuits
The AD7776/AD7777/AD7778 family of ADCs is intended to
interface to DSP machines such as the ADSP-2101, ADSP-2105,
the TMS320 family and microcontrollers such as the 80C196
family.
Figure 7 shows the AD7776/AD7777/AD7778 interfaced to the
TMS320C10 at 20.5 MHz and the TMS320C14 at 25 MHz.
Figure 8 shows the interface with the TMS320C25 at 40 MHz.
Note that one wait state is required with this interface. The
ADSP-2101-50 and the ADSP-2105-40 interface is shown in
Figure 9. One wait state is required with these machines.
*
ADDITIONAL PINS OMITTED FOR CLARITY
ADDRESS BUS
DATA BUS
D15–D0
TMS320C10-20.5
TMS320C14-25
A11–A0
WE
(C10) DEN
(C14) REN
CS
DB9–DB0
RD
WR
AD7776/
AD7777/
AD7778
*
ADDR
DECODE
Figure 7. AD7776/AD7777/AD7778 to TMS320C10 and
TMS320C14 Interface
ADDRESS BUS
DATA BUS
*
ADDITIONAL PINS OMITTED FOR CLARITY
CS
DB9–DB0
RD
WR
D15–D0
A15–A0
IS
READY
MSC
STRB
R/W
TMS320C25-40
ADDR
DECODE
AD7776/
AD7777/
AD7778
*
Figure 8. AD7776/AD7777/AD7778 to TMS320C25 Interface
Figure 10 shows the interface with the 80C196KB at 12 MHz
and the 80C196KC at 16 MHz. One wait state is required with
the 16 MHz machine. The 80C196 is configured to operate
with a 16-bit multiplexed address/data bus.
Table I provides a truth table for the AD7776/AD7777/AD7778
and summarizes their microprocessor interfacing features. Note
that a read instruction to any of the devices while a conversion
is in progress immediately stops that conversion and returns
unreliable data over the data bus.
*ADDITIONAL PINS OMITTED FOR CLARITY
ADDRESS BUS
DATA BUS
CS
DB9–DB0
RD
WR
D23–D6
A13–A0
WR
RD
ADSP-2101-50
ADSP-2105-40
ADDR
DECODE
EN
DMS
AD7776/
AD7777/
AD7778
*
Figure 9. AD7776/AD7777/AD7778 to ADSP-2101 and
ADSP-2105 Interface
*ADDITIONAL PINS OMITTED FOR CLARITY
DATA BUS (10)
CS
DB9–DB0
AD7776/
AD7777/
AD7778
*
RD
WR
ADDRESS BUS
WR
RD
80C196KB-12
80C196KC-16
AD15–AD6
(PORT 4)
ALE
‘373
LATCH
ADDR
DECODER
AD7–AD0
(PORT 3)
Figure 10. AD7776/AD7777/AD7778 to 80C196 Interface