Datasheet

ManualsBrandsANALOG DEVICES ManualsData collecting ICsData acquisition IC - AD converter (ADC) External TSSOP 16

4-Channel, 10- and 12-Bit ADCs with I

C-

Compatible Interface in 16-Lead TSSOP

AD7993/AD7994

Rev. 0

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infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

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FEATURES

10- and 12-bit ADC with fast conversion time: 2 µs typ

4 single-ended analog input channels

Specified for V

of 2.7 V to 5.5 V

Low power consumption

Fast throughput rate: 188 kSPS

Temperature range:−40°C to +125°C

Sequencer operation

Automatic cycle interval mode

C®-compatible serial interface

C interface supports standard, fast, and high speed modes

Out-of-range indicator/alert function

Pin-selectable addressing via AS

Shutdown mode: 1 µA max

16-lead TSSOP package

See

AD7998 and AD7992 for 8-channel and 2-channel

equivalent devices, respectively.

GENERAL DESCRIPTION

The AD7993/AD7994 are 4-channel, 10- and 12-bit, low power,

successive approximation ADCs with an I

C-compatible inter-

face. The parts operate from a single 2.7 V to 5.5 V power

supply and feature a 2 µs conversion time. The parts contain a

4-channel multiplexer and track-and-hold amplifier that can

handle input frequencies up to 11 MHz.

The AD7993/AD7994 provide a 2-wire serial interface that is

compatible with I

C interfaces. Each part comes in two versions,

AD7993-0/AD7994-0 and AD7993-1/AD7994-1, and each

version allows for at least two different I

C addresses. The I

interface on the AD7993-0/AD7994-0 supports standard and

fast I

C interface modes. The I

C interface on the AD7993-1/

AD7994-1 supports standard, fast, and high speed I

C interface

modes.

The AD7993/AD7994 normally remain in a shutdown state

while not converting, and power up only for conversions. The

conversion process can be controlled using the

CONVST

pin,

by a command mode where conversions occur across I

C write

operations, or an automatic conversion interval mode selected

through software control.

The AD7993/AD7994 require an external reference that should

be applied to the REF

pin and can be in the range of 1.2 V to

. This allows the widest dynamic input range to the ADC.

FUNCTIONAL BLOCK DIAGRAM

10-/12-BIT

SUCCESSIVE

APPROXIMATION

ADC

CONTROL

LOGIC

I/P

MUX

AD7993/AD7994

SCL

C INTERFACE

CYCLE TIMER

ALERT STATUS

CONFIGURATION

CONVERSION

RESULT

SDA

AGND

CONVST

AGND

OSCILLATOR

REF

DATA

LOW

LIMIT

T/H

DATA

HIGH

LIMIT

HYSTERESIS

03472-0-001

ALERT/

BUSY

Figure 1.

On-chip limit registers can be programmed with high and low

limits for the conversion result, and an open-drain, out-of-

range indicator output (ALERT) becomes active when the

programmed high or low limits are violated by the conversion

result. This output can be used as an interrupt.

PRODUCT HIGHLIGHTS

1. 2 µs conversion time with low power consumption.

2. I

C-compatible serial interface with pin-selectable

addresses. Two AD7993/AD7994 versions allow five

AD7993/AD7994 devices to be connected to the same

serial bus.

3. The parts feature automatic shutdown while not converting

to maximize power efficiency. Current consumption is

1 µA max when in shutdown mode.

4. Reference can be driven up to the power supply.

5. Out-of-range indicator that can be software disabled or

enabled.

6. One-shot and automatic conversion rates.

7. Registers can store minimum and maximum conversion

results.

Summary of content (32 pages)

PAGE 1
4-Channel, 10- and 12-Bit ADCs with I2CCompatible Interface in 16-Lead TSSOP AD7993/AD7994 FEATURES FUNCTIONAL BLOCK DIAGRAM 10- and 12-bit ADC with fast conversion time: 2 µs typ 4 single-ended analog input channels Specified for VDD of 2.7 V to 5.
PAGE 2
AD7993/AD7994 TABLE OF CONTENTS AD7993 Specifications..................................................................... 3 Serial Interface ................................................................................ 23 AD7994 Specifications..................................................................... 5 Serial Bus Address...................................................................... 23 I2C Timing Specifications ................................................................
PAGE 3
AD7993/AD7994 AD7993 SPECIFICATIONS Temperature range for B version is −40°C to +125°C. Unless otherwise noted, VDD = 2.7 V to 5.5 V; REFIN = 2.5 V; For the AD7993-0, all specifications apply for fSCL up to 400 kHz. For the AD7993-1, all specs apply for fSCL up to 3.4 MHz, unless otherwise noted. TA = TMIN to TMAX. Table 1.
PAGE 4
AD7993/AD7994 Parameter LOGIC INPUTS (CONVST) Input High Voltage, VINH Input Low Voltage, VINL Input Leakage Current, IIN Input Capacitance, CIN3 LOGIC OUTPUTS (OPEN-DRAIN) Output Low Voltage, VOL Floating-State Leakage Current Floating-State Output Capacitance3 Output Coding CONVERSION RATE Conversion Time Throughput Rate Mode 1 (Reading after the Conversion) Mode 2 POWER REQUIREMENTS VDD IDD Power-Down Mode, Interface Inactive Power-Down Mode, Interface Active Operating, Interface Inactive Operating, In
PAGE 5
AD7993/AD7994 AD7994 SPECIFICATIONS Temperature range for B version is −40°C to +125°C. Unless otherwise noted, VDD = 2.7 V to 5.5 V; REFIN = 2.5 V. For the AD7994-0, all specifications apply for fSCL up to 400 kHz. For the AD7994-1, all specs apply for fSCL up to 3.4 MHz, unless otherwise noted. TA = TMIN to TMAX. Table 2.
PAGE 6
AD7993/AD7994 Parameter LOGIC INPUTS (CONVST) Input High Voltage, VINH Input Low Voltage, VINL Input Leakage Current, IIN Input Capacitance, CIN3 LOGIC OUTPUTS (OPEN-DRAIN) Output Low Voltage, VOL Floating-State Leakage Current Floating-State Output Capacitance3 Output Coding CONVERSION RATE Conversion Time Throughput Rate Mode 1 (Reading after the Conversion) Mode 2 POWER REQUIREMENTS VDD IDD Power-Down Mode, Interface Inactive Power-Down Mode, Interface Active Operating, Interface Inactive Operating, In
PAGE 7
AD7993/AD7994 I2C TIMING SPECIFICATIONS Guaranteed by initial characterization. All values measured with input filtering enabled. CB refers to capacitive load on the bus line. tr and tf measured between 0.3 VDD and 0.7 VDD. High speed mode timing specifications apply to the AD7993-1/AD7994-1 only. Standard and fast mode timing specifications apply to both the AD7993-0/AD7994-0 and the AD7993-1/AD7994-1. See Figure 2. Unless otherwise noted, VDD = 2.7 V to 5.5 V; REFIN = 2.5 V; TA =TMIN to TMAX. Table 3.
PAGE 8
AD7993/AD7994 Parameter t10 t11 t11A AD7993/AD7994 Limit at TMIN, TMAX Min Max Unit 300 ns 20 + 0.1 CB 300 ns Conditions Standard mode Fast mode High speed mode CB = 100 pF max CB = 400 pF max Standard mode Fast mode High speed mode CB = 100 pF max CB = 400 pF max Standard mode 10 20 t12 tSP2 40 80 1000 ns ns ns 20 + 0.1 CB 300 ns 10 20 80 160 300 300 ns ns ns ns 40 80 50 10 ns ns ns ns typ µs 20 + 0.
PAGE 9
AD7993/AD7994 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 4.
PAGE 10
AD7993/AD7994 PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS AGND 1 AGND 2 AGND 3 AGND VDD 4 AD7993/ AD7994 16 AGND 15 SCL SDA 13 ALERT/BUSY TOP VIEW 5 (Not to Scale) 12 CONVST REFIN 6 11 AS VIN1 7 10 VIN2 VIN3 8 9 VIN4 03472-0-003 14 Figure 3. 16-Lead TSSOP Pin Configuration Table 5. Pin Function Descriptions Pin No. 1, 2, 3, 4, 16 Mnemonic AGND 5 6 VDD REFIN 7 8 9 10 11 VIN1 VIN3 VIN4 VIN2 AS 12 CONVST 13 ALERT/BUSY 14 15 SDA SCL Function Analog Ground.
PAGE 11
AD7993/AD7994 TERMINOLOGY Signal-to-Noise and Distortion Ratio (SINAD) The measured ratio of signal-to-noise and distortion at the output of the A/D converter. The signal is the rms amplitude of the fundamental. Noise is the sum of all nonfundamental signals up to half the sampling frequency (fS/2), excluding dc. The ratio is dependent on the number of quantization levels in the digitization process; the more levels, the smaller the quantization noise.
PAGE 12
AD7993/AD7994 TYPICAL PERFORMANCE CHARACTERISTICS 75 0 FS = 121kSPS FSCL = 3.4MHz FIN = 10kHz SNR = 71.84dB SINAD = 71.68dB THD = 86.18dB SFDR = –88.70dB –20 70 VDD = 4.5V 65 VDD = 3V SINAD (dB) –60 60 VDD = 3.3V 55 VDD = 2.7V –80 50 –100 45 0 20 40 60 FREQUENCY (kHz) 40 03473-0-004 –120 1 1.0 0.8 0.6 0.4 INL ERROR (LSB) SINAD (dB) 1000 Figure 7. AD7994 SINAD vs. Analog Input Frequency for Various Supply Voltages, 3.4 MHz fSCL, 136 kSPS FS = 121kSPS FSCL = 3.
PAGE 13
1.0 1.0 0.8 0.8 0.6 0.6 0.4 0.4 DNL ERROR (LSB) 0.2 0 –0.2 –0.4 0.2 0 –0.2 -0.6 –0.8 –0.8 500 1000 1500 2000 2500 3000 3500 –1.0 1.2 03473-0-010 0 4000 CODE NEGATIVE DNL –0.4 –0.6 –1.0 POSITIVE DNL 1.7 2.2 2.7 3.2 3.7 4.2 4.7 REFERENCE VOLTAGE (V) 03473-0-013 INL ERROR (LSB) AD7993/AD7994 Figure 13. AD7994 Change in DNL vs. Reference Voltage VDD = 5 V, Mode 1, 121 kSPS Figure 10. Typical INL, VDD = 2.7 V, Mode 1, 3.4 MHz fSCL, 121 kSPS 1.0 0.0007 0.8 0.
PAGE 14
AD7993/AD7994 12.0 2.0 TEMPERATURE = +85°C TEMPERATURE = +25°C TEMPERATURE = –40°C TEMPERATURE = +85°C TEMPERATURE = +25°C TEMPERATURE = –40°C ENOB VDD = 3V 11.6 MODE 2 - 147kSPS 73 SINAD VDD = 5V 72 1.2 1.0 MODE 1 - 121kSPS 0.8 11.4 11.2 71 SINAD VDD = 3V 11.0 SINAD (dB) 1.4 11.8 70 0.6 10.8 0.4 69 0 2.7 3.2 3.7 4.2 4.7 5.2 SUPPLY VOLTAGE (V) 10.4 Figure 16. AD7994 Average Supply Current vs. Supply Voltage for Various Temperatures 68 1.200 2.048 2.500 2.700 3.000 3.300 4.096 4.
PAGE 15
AD7993/AD7994 CIRCUIT INFORMATION CONVERTER OPERATION The AD7993/AD7994 are successive approximation analog-todigital converters based around a capacitive DAC. Figure 18 and Figure 19 show simplified schematics of an ADC during the acquisition and conversion phase, respectively. Figure 18 shows an ADC during the acquisition phase. SW2 is closed and SW1 is in Position A. The comparator is held in a balanced condition and the sampling capacitor acquires the signal on VINx.
PAGE 16
AD7993/AD7994 TYPICAL CONNECTION DIAGRAM ANALOG INPUT Figure 22 shows the typical connection diagram for the AD7993/ AD7994. In Figure 22 the address select pin (AS) is tied to VDD; however, AS can also be tied to AGND or left floating, allowing the user to select up to five AD7993/AD7994 devices on the same serial bus. An external reference must be applied to the AD7993/AD7994. This reference can be in the range of 1.2 V to VDD.
PAGE 17
AD7993/AD7994 –40 –50 VDD = 3V –60 THD (dB) –70 VDD = 3.3V VDD = 2.7V –80 VDD = 4.5V VDD = 5.5V –90 When no amplifier is used to drive the analog input, the source impedance should be limited to low values. The maximum source impedance depends on the amount of total harmonic distortion (THD) that can be tolerated. THD increases as the source impedance increases, and performance degrades. Figure 23 shows the THD vs.
PAGE 18
AD7993/AD7994 INTERNAL REGISTER STRUCTURE The AD7993/AD7994 contain 17 internal registers (see Figure 25) that are used to store conversion results, high and low conversion limits, and information to configure and control the device. Sixteen are data registers and one is an address pointer register. Each data register has an address that the address pointer register points to when communicating with it. The conversion result register is the only data register that is read only.
PAGE 19
AD7993/AD7994 CONFIGURATION REGISTER The configuration register is an 8-bit read/write register that is used to set the operating modes of the AD7993/AD7994. The bit functions are outlined in Table 9. A single-byte write is necessary when writing to the configuration register. Table 9. Configuration Register Bit Function Descriptions and Default Settings at Power-Up D7 CH4 0 D6 CH3 0 D5 CH2 0 D4 CH1 0 D3 FLTR 1 D2 ALERT EN 0 D1 BUSY/ALERT 0 D0 ALERT/BUSY POLARITY 0 Table 10.
PAGE 20
AD7993/AD7994 CONVERSION RESULT REGISTER DATAHIGH Register CH1/CH2/CH3/CH4 The conversion result register is a 16-bit read-only register that stores the conversion result from the ADC in straight binary format. A 2-byte read is necessary to read data from this register. Table 13 shows the contents of the first byte to be read from the AD7993/AD7994 and Table 14 shows the contents of the second byte to be read.
PAGE 21
AD7993/AD7994 Hysteresis Register (CH1/CH2/CH3/CH4) ALERT STATUS REGISTER Each hysteresis register is a 16-bit read/write register, of which only the 12 LSBs of the register are used. The hysteresis register stores the hysteresis value, N, when using the limit registers. Each pair of limit registers has a dedicated hysteresis register. The hysteresis value determines the reset point for the ALERT pin/Alert_Flag if a violation of the limits has occurred.
PAGE 22
AD7993/AD7994 CYCLE TIMER REGISTER SAMPLE DELAY AND BIT TRIAL DELAY The cycle timer register is an 8-bit read/write register that stores the conversion interval value for the automatic cycle interval mode of the AD7993/AD7994 (see the Modes of Operation section). D5 to D3 of the cycle timer register are unused and should contain 0s at all times. On power-up, the cycle timer register contains all 0s, thus disabling automatic cycle operation of the AD7993/AD7994.
PAGE 23
AD7993/AD7994 SERIAL INTERFACE Control of the AD7993/AD7994 is carried out via the I2Ccompatible serial bus. The AD7993/AD7994 is connected to this bus as a slave device under the control of a master device, for example, the processor. SERIAL BUS ADDRESS Like all I2C-compatible devices, the AD7993/AD7994 have a 7-bit serial address. The 3 MSB of this address for the AD7993/ AD7994 are set to 010. The AD7993/AD7994 come in two versions, the AD7993-0/AD7994-0 and AD7993-1AD7994-1.
PAGE 24
AD7993/AD7994 WRITING TO THE AD7993/AD7994 Depending on the register being written to, there are three different writes for the AD7993/AD7994. WRITING TWO BYTES OF DATA TO A LIMIT OR HYSTERESIS REGISTER WRITING TO THE ADDRESS POINTER REGISTER FOR A SUBSEQUENT READ Each of the four limit registers are 16-bit registers, so two bytes of data are required to write a value to any one of them.
PAGE 25
AD7993/AD7994 1 9 1 9 SCL 0 SDA 1 0 A3 A2 A1 A0 C4 R/W C3 C1 P3 P2 P1 P0 ACK. BY AD7993/AD7994 FRAME 1 SERIAL BUS ADDRESS BYTE 9 C2 ACK. BY AD7993/AD7994 START BY MASTER FRAME 2 ADDRESS POINTER REGISTER 1 9 1 9 SCL (CONTINUED) 0 0 0 0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 ACK. BY AD7993/AD7994 MOST SIGNIFICANT DATA BYTE D1/0 D0/0 ACK. BY AD7993/AD7994 STOP BY MASTER LEAST SIGNIFICANT DATA BYTE 03472-0-028 SDA (CONTINUED) Figure 28. Two-Byte Write Sequence Rev.
PAGE 26
AD7993/AD7994 READING DATA FROM THE AD7993/AD7994 Reading data from the AD7993/AD7994 is a 1-byte or 2-byte operation. Reading back the contents of the alert status register or the cycle timer register is a single-byte read operation, as shown in Figure 29. This assumes the particular register address has previously been set up by a single-byte write operation to the address pointer register, as shown in Figure 26.
PAGE 27
AD7993/AD7994 ALERT/BUSY PIN BUSY The ALERT/BUSY pin may be configured as an alert output or busy output, as shown in Table 12. When the ALERT/BUSY pin is configured as a BUSY output, the pin is used to indicate when a conversion is taking place. The polarity of the BUSY pin is programmed through bit D0 in the configuration register. SMBus ALERT The AD7993/AD7994 alert output is an SMBus interrupt line for devices that want to trade their ability to master for an extra pin.
PAGE 28
AD7993/AD7994 MODES OF OPERATION When supplies are first applied to the AD7993/AD7994, the ADC powers up in shutdown mode and normally remains in this shutdown state while not converting. There are three different methods of initiating a conversion on the devices. MODE 1—USING THE CONVST PIN A conversion can be initiated on the AD7993/AD7994 by pulsing the CONVST signal.
PAGE 29
AD7993/AD7994 MODE 2—COMMAND MODE This mode allows a conversion to be automatically initiated any time a write operation occurs. In order to use this mode, Command Bits C4 to C1 in the address pointer byte, shown in Table 7, must be programmed. To select a single analog input for conversion in this mode, the user must set bits C4 to C1of the address pointer byte to indicate which channel to convert (see Table 27). When all four command bits are 0, this mode is not in use.
PAGE 30
AD7993/AD7994 1 8 9 W A 1 A 9 COMMAND/ADDRESS POINT BYTE A SCL SDA 7-BIT ADDRESS S ACK BY AD7993/AD7994 1 9 ACK BY AD7993/AD7994 1 9 9 SCL Sr 7-BIT ADDRESS R FIRST DATA BYTE (MSBs) A A ACK BY AD7993/AD7994 SECOND DATA BYTE (LSBs) A ACK BY MASTER Sr/P NACK BY MASTER 03472-0-033 SDA Figure 33.
PAGE 31
AD7993/AD7994 OUTLINE DIMENSIONS 5.10 5.00 4.90 16 9 4.50 4.40 4.30 6.40 BSC 1 8 PIN 1 1.20 MAX 0.15 0.05 0.20 0.09 0.30 0.19 0.65 BSC COPLANARITY 0.10 SEATING PLANE 8° 0° 0.75 0.60 0.45 COMPLIANT TO JEDEC STANDARDS MO-153AB Figure 35.
PAGE 32
AD7993/AD7994 NOTES Purchase of licensed I2C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03472–0–10/04(0) Rev.