Datasheet

AD7993/AD7994
Rev. 0 | Page 19 of 32
CONFIGURATION REGISTER
The configuration register is an 8-bit read/write register that is used to set the operating modes of the AD7993/AD7994. The bit functions
are outlined in Table 9. A single-byte write is necessary when writing to the configuration register.
Table 9. Configuration Register Bit Function Descriptions and Default Settings at Power-Up
D7 D6 D5 D4 D3 D2 D1 D0
CH4 CH3 CH2 CH1 FLTR ALERT EN BUSY/ALERT ALERT/BUSY POLARITY
0 0 0 0 1 0 0 0
Table 10. Bit Function Descriptions
Bit Mnemonic Comment
D7 to D4 CH4 to CH1
These 4-channel address bits select the analog input channel(s) to be converted. A 1 in any of Bits D7 to D4
selects a channel for conversion. If more than one channel bit is set to 1, the AD7993/AD7994 sequence
through the selected channels, starting with the lowest channel. All unused channels should be set to 0.
Table 11 shows how these 4-channel address bits are decoded. Prior to initiating a conversion, the channel(s)
must be selected in the configuration register.
D3 FLTR
The value written to this bit of the control register determines whether the filtering on SDA and SCL is
enabled or is to be bypassed. If this bit is a 1, then the filtering is enabled; if it is a 0, the filtering is bypassed.
D2 ALERT EN
The hardware ALERT function is enabled if this bit is set to 1 and disabled if this bit is set to 0. This bit is used
in conjunction with the BUSY/ALERT bit to determine if the ALERT/BUSY pin act as an ALERT or a BUSY output
(see Table 12).
D1 BUSY/ALERT
This bit is used in conjunction with the ALERT EN bit to determine if the ALERT/BUSY output, Pin 13, acts as an
ALERT or BUSY output (see Table 12), and if Pin 13 is configured as an ALERT output pin, if it is to be reset.
D0
BUSY/ALERT
POLARITY
This bit determines the active polarity of the ALERT/BUSY pin regardless of whether it is configured as an
ALERT or BUSY output. It is active low if this bit is set to 0, and active high if it is set to 1.
Table 11. Channel Selection
D7 D6 D5 D4 Analog Input Channel Comments
0 0 0 0 No channel selected; see address pointer byte, Mode 2.
0 0 0 1 Convert on V
IN
1.
0 0 1 0 Convert on V
IN
2.
0 0 1 1 Sequence between V
IN
1 and V
IN
2.
0 1 0 0 Convert on V
IN
3.
0 1 0 1 Sequence between V
IN
1 and V
IN
3.
0 1 1 0 Sequence between V
IN
2 and V
IN
3.
0 1 1 1 Sequence between V
IN
1, V
IN
2, and V
IN
3.
1 0 0 0 Convert on V
IN
4.
1 0 0 1 Sequence between V
IN
1 and V
IN
4.
1 0 1 0 Sequence between V
IN
2 and V
IN
4.
1 0 1 1 Sequence between V
IN
1, V
IN
2, and V
IN
4.
1 1 0 0 Sequence between V
IN
3 and V
IN
4.
1 1 0 1 Sequence between V
IN
1, V
IN
3, and V
IN
4.
1 1 1 0 Sequence between V
IN
2, V
IN
3, and V
IN
4.
1 1 1 1 Sequence between V
IN
1, V
IN
2, V
IN
3, and V
IN
4.
The AD7993/AD7994 convert on the selected channel in
the sequence in ascending order, starting with the
lowest channel in the sequence.
Table 12. Alert/Busy Function
D2 D1 ALERT/BUSY Pin Configuration
0 0 Pin does not provide any interrupt signal.
0 1 Pin configured as a busy output.
1 0 Pin configured as an alert output.
1 1
Resets the ALERT output pin, the Alert_Flag bit in the conversion result register, and the entire alert status register
(if any is active). If 1/1 is written to Bits D2/D1 in the configuration register to reset the ALERT pin, the Alert_Flag bit,
and the alert status register, the contents of the configuration register read 1/0 for D2/D1, respectively, if read back.