Datasheet
AD8112
Rev. 0 | Page 9 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC = NO CONNECT
RESET
CE
DATA OUT
CLK
DATA IN
UPDATE
SER/PAR
NC
NC
NC
NC
NC
NC
NC
NC
NC
A0
A1
A2
DGND
D0
D1
D2
D3
D4
26
AV
CC
27
NC
28
AV
EE
29
NC
30
AV
CC
31
NC
32
AV
EE
33
NC
34
AV
CC
35
NC
36
AV
EE
37
NC
38
AV
CC
39
OUT07
2
DGND
3
AGND
4
IN08
7
AGND
6
IN09
5
AGND
1
DV
CC
8
IN10
9
AGND
10
IN11
12
IN12
13
AGND
14
IN13
15
AGND
16
IN14
17
AGND
18
IN15
19
AGND
20
AV
EE
21
AV
CC
22
AV
CC
23
NC
24
AV
EE
25
NC
11
AGND
74
DGND
DV
CC
73
AGND
72
IN07
69
AGND
70
IN06
71
AGND
75
68
IN05
67
AGND
66
IN04
64
IN03
63
AGND
62
IN02
61
AGND
60
IN01
59
AGND
58
IN00
57
AGND
56
AV
EE
55
AV
CC
54
AV
CC
00
53
OUT00
52
AV
EE
00/01
51
OUT01
65
AGND
40
AV
EE
06/07
41
OUT06
42
AV
CC
05/06
43
OUT05
44
AV
EE
04/05
45
OUT04
46
AV
CC
03/04
47
OUT03
48
AV
EE
02/03
49
OUT02
50
AV
CC
01/02
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
PIN 1
AD8112
TOP VIEW
(Not to Scale)
06523-006
Figure 6. Pin Configuration
Table 8. Pin Function Descriptions
Pin No. Mnemonic Description
58, 60, 62, 64, 66, 68, 70, 72, 4, 6, 8, 10,
12, 14, 16, 18
IN00 to IN15
1
Analog Inputs for Channel Numbers 00 through 15.
96 DATA IN Serial Data Input, TTL-compatible.
97 CLK Clock, TTL-compatible. Falling edge triggered.
98 DATA OUT Serial Data Output, TTL-compatible.
95
UPDATE Enable (Transparent) Low. Allows serial register to connect directly to switch
matrix. Data latched when high.
100
RESET
Disable Outputs, Active Low.
99
CE
Chip Enable, Enable Low. Must be low to clock in and latch data.
94
SER/PAR Serial Data/Parallel Data. When low, this pin selects serial data mode; when
high, this pin selects parallel data mode, high. Must be connected.
53, 51, 49, 47, 45, 43, 41, 39
OUT00 to
OUT07
1
Analog Outputs for Channel Numbers 00 Through 07.
3, 5, 7, 9, 11, 13, 15, 17, 19, 57, 59, 61, 63,
65, 67, 69, 71, 73
AGND Analog Ground for Inputs and Switch Matrix. Must be connected.
1, 75 DV
CC
5 V for Digital Circuitry.
2, 74, 81 DGND Ground for Digital Circuitry.
20, 24, 28, 32, 36, 56 AV
EE
−5 V for Inputs and Switch Matrix.