Datasheet

Data Sheet AD8120
Rev. A | Page 13 of 16
SPI Timing
Figure 21 shows the SPI 2-byte timing sequence. Table 11 lists
the timing parameters for SPI.
CS
SCK
SDI/SDO
R/W
0 0 0 0 0 C1 C0 X X D5 D4 D3 D2 D1 D0
07839-005
Figure 21. SPI 2-Byte Timing Sequence
t
6
t
1
t
2
t
4
t
5
t
3
CS
SCK
SDI R/W D1 D0
07839-006
Figure 22. SPI Timing Diagram
Table 11. SPI Timing Parameters
Parameter Description
t
1
Setup time,
CS
to SCK
t
2
Clock pulse high, SCK
t
3
Clock pulse low, SCK
t
4
Setup time, SDI to SCK
t
5
Hold time, SDI to SCK
t
6
Hold time, SCK to
CS
I
2
C Timing
Figure 23 shows the I
2
C 3-byte timing sequence. Table 12 lists
the timing parameters for I
2
C.
SDA
0 1 1 1 0 00 0 00 0 XX
D0 D1 D2 D3 D4 D5 C0 C1 A0 A1
ACK ACK ACK
R/W
SCL
07839-007
Figure 23. I
2
C 3-Byte Timing Sequence
SD
A
SCL
t
1
t
2
t
3
t
5
t
6
t
4
07839-008
Figure 24. I
2
C Timing Diagram
Table 12. I
2
C Timing Parameters
Parameter Description
t
1
Setup time, SDA to SCL
t
2
Clock pulse high, SCL
t
3
Clock pulse low, SCL
t
4
Setup time, SDA (input) to SCL
t
5
Hold time, SDA (input) to SCL
t
6
Hold time, SCL to SDA