Datasheet

AD8120 Data Sheet
Rev. A | Page 4 of 16
Parameter Test Conditions/Comments Min Typ Max Unit
DIGITAL CONTROL INPUT CHARACTERISTICS
(SEE BELOW FOR POWER DOWN)
SDO/SDA, SCK/SCL, SDI/A1,
CS
/A0, SER_SEL,
MODE
Input Bias Current 2 μA
Input High Voltage 2.6 V
Input Low Voltage
0.6
V
Output High Voltage 4.5 V
Output Low Voltage 0.6 V
POWER DOWN CHARACTERISTICS
PD
Input High Voltage 4.0 V
Input Low Voltage 0.6 V
SPI TIMING CHARACTERISTICS
Clock Frequency SCK 10 MHz
CS
Setup Time, t
1
CS
to SCK 5 ns
Clock Pulse High, t
2
SCK 50 ns
Clock Pulse Low, t
3
SCK 50 ns
Data Setup Time, t
4
SDI to SCK 5 ns
Data Hold Time, t
5
SDI to SCK 5 ns
CS
Hold Time, t
6
SCK to
CS
5 ns
I
2
C TIMING CHARACTERISTICS
Clock Frequency SCL 100 kHz
Start Setup Time, t
1
SDA to SCL 10 ns
Clock Pulse High, t
2
SCL 5 μs
Clock Pulse Low, t
3
SCL 5 μs
Data Setup Time, t
4
SDA (input) to SCL 100 ns
Data Hold Time, t
5
SDA (input) to SCL 100 ns
Hold Time, t
6
SCL to SDA 10 ns
POWER SUPPLY
Positive Supply Range 4.5 5.5 V
Negative Supply Range −5.5 −4.5 V
Positive Quiescent Current Delay = 0 ns 44 mA
Delay = 50 ns 114 mA
Powered down,
PD
low 4 mA
Negative Quiescent Current Delay = 0 ns 37 mA
Delay = 50 ns 108 mA
Powered down,
PD
low 0.5 mA
Quiescent Current Drift T
MIN
to T
MAX
, delay = 0 ns 0.13 mA/°C
T
MIN
to T
MAX
, delay = 50 ns 0.36 mA/°C
+PSRR R
L
= 150 Ω, delay = 50 ns 56 dB
−PSRR R
L
= 150 Ω, delay = 50 ns 44 dB