Datasheet

ManualsBrandsANALOG DEVICES ManualsLinear ICsLinear IC - Op-amp, differential amplifier Differential MSOP 8

G = 0.2, Level Translation,

16-Bit ADC Driver

AD8275

Rev. A

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FEATURES

Translates ±10 V to +4 V

Drives 16-bit SAR ADCs

Small MSOP package

Input overvoltage: +40 V to −35 V (V

= 5 V)

Fast settling time: 450 ns to 0.001%

Rail-to-rail output

Wide supply operation: +3.3 V to +15 V

High CMRR: 80 dB

Low gain drift: 1 ppm/°C

Low offset drift: 2.5 μV/°C

APPLICATIONS

Level translator

ADC driver

Instrumentation amplifier building block

Automated test equipment

PIN CONFIGURATION

07546-001

REF1

–IN

+IN

–V

REF2

OUT

SENSE

AD8275

TOP VIEW

(Not to Scale)

Figure 1.

TYPICAL APPLICATION

07546-002

VREF

4.096V

AD8275

50kΩ

0.1µF

50kΩ

20kΩ

33Ω

10kΩ

+IN

–IN

VIN

REF2

REF1

–V

+5V

OUT

SENSE

0.1µF

2.7nF

10µF

AD7685

VDD

GNDREF

IN+

IN–

+10V

–10V

+4.048V

+0.048V

+2.048V

Figure 2. Translating ±10 V to 4.096 V ADC Full Scale

GENERAL DESCRIPTION

The AD8275 is a G = 0.2 difference amplifier that can be used

to translate ±10 V signals to a +4 V level. It solves the problem

typically encountered in industrial and instrumentation applic-

ations where ±10 V signals must be interfaced to a single-supply

4 V or 5 V ADC. The AD8275 interfaces the two signal levels,

simplifying design.

The AD8275 has fast settling time of 450 ns and low distortion,

making it suitable for driving medium speed successive approx-

imation (SAR) ADCs. Its wide input voltage range and rail-to-

rail outputs make it an easy to use building block. Single-supply

operation reduces the power consumption of the amplifier and

helps to protect the ADC from overdrive conditions.

Internal, matched, precision laser-trimmed resistors ensure

low gain error, low gain drift of 1 ppm/°C (maximum), and

high common-mode rejection of 80 dB. Low offset and low

offset drift, combined with its fast settling time, make the

AD8275 suitable for a variety of data acquisition applications

where accurate and quick capture is required.

The AD8275 can be used as an analog front end, or it can follow

buffers to level translate high voltages to a voltage range accepted

by the ADC. In addition, the AD8275 can be configured for diff-

erential outputs if used with a differential ADC.

The AD8275 is available in a space-saving, 8-lead MSOP

and is specified for performance over the −40°C to +85°C

temperature range.

Table 1. Difference Amplifiers by Category

Low Distortion High Voltage

Single-Supply

Current Sense

AD8270 AD628 AD8202

AD8273 AD629 AD8203

AD8274 AD8205

AD8275 AD8206

AMP03 AD8216

Summary of content (16 pages)

PAGE 1
G = 0.2, Level Translation, 16-Bit ADC Driver AD8275 PIN CONFIGURATION Translates ±10 V to +4 V Drives 16-bit SAR ADCs Small MSOP package Input overvoltage: +40 V to −35 V (VS = 5 V) Fast settling time: 450 ns to 0.001% Rail-to-rail output Wide supply operation: +3.3 V to +15 V High CMRR: 80 dB Low gain drift: 1 ppm/°C Low offset drift: 2.5 μV/°C REF1 1 –IN 2 AD8275 +IN 3 TOP VIEW (Not to Scale) –VS 4 REF2 7 +VS 6 OUT 5 SENSE Figure 1. TYPICAL APPLICATION +5V 0.1µF 7 50kΩ +2.
PAGE 2
AD8275 TABLE OF CONTENTS Features .............................................................................................. 1 Reference ..................................................................................... 12 Applications ....................................................................................... 1 Common-Mode Input Voltage Range ..................................... 12 Pin Configuration .............................................................................
PAGE 3
AD8275 SPECIFICATIONS VS = 5 V, G = 0.2, REF1 connected to GND and REF2 connected to 5 V, RL = 2 kΩ connected to VS/2, TA = 25°C, unless otherwise noted. Specifications referred to output unless otherwise noted. Table 2. Parameter DYNAMIC PERFORMANCE Small Signal Bandwidth Slew Rate Settling Time to 0.01% Settling Time to 0.001% Overload Recovery Time NOISE/DISTORTION 1 THD + N Voltage Noise Spectral Noise Density GAIN Gain Error Gain Drift Gain Nonlinearity OFFSET AND CMRR Offset 2 vs. Temperature vs.
PAGE 4
AD8275 ABSOLUTE MAXIMUM RATINGS Table 3. The difference between the total drive power and the load power is the drive power dissipated in the package. PD = Quiescent Power + (Total Drive Power − Load Power) V V PD = (VS × I S ) +  S × OUT RL  2 3 mA  VOUT 2 –  RL  In single-supply operation with RL referenced to –VS, the worst case is VOUT = VS/2. −65°C to +130°C −40°C to +85°C 135°C/W 140°C Airflow increases heat dissipation, effectively reducing θJA.
PAGE 5
AD8275 REF1 1 –IN 2 AD8275 +IN 3 TOP VIEW (Not to Scale) –VS 4 8 REF2 7 +VS 6 OUT 5 SENSE 07546-001 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 4. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic REF1 −IN +IN −VS SENSE OUT +VS REF2 Description Reference Pin. Sets the output voltage level (see the Reference section). Negative Input Pin. Positive Input Pin. Negative Supply Pin. Sense Output Pin. Tie this pin to the OUT pin.
PAGE 6
AD8275 TYPICAL PERFORMANCE CHARACTERISTICS VS = 5 V, G = 0.2, REF1 connected to GND and REF2 connected to 5 V, RL = 2 kΩ connected to VS/2, TA = 25°C, unless otherwise noted. 300 250 14 200 OFFSET VOLTAGE (µV) 12 HITS 10 8 6 4 150 100 50 0 –50 –100 –150 07546-004 0 –600 –400 –200 0 200 400 07546-007 –200 2 –250 NORMALIZED AT 25°C, REPRESENTATIVE SAMPLES –300 –40 –20 0 20 40 60 80 100 600 120 TEMPERATURE (°C) OFFSET VOLTAGE (µV) Figure 5.
PAGE 7
AD8275 35 120 20 15 10 5 0 –5 –10 –15 –20 –25 –0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 100 80 60 40 20 0 07546-013 POWER SUPPLY REJECTION (dB) 25 07546-010 INPUT COMMON-MODE VOLTAGE (V) 30 –20 100 5.5 1k Figure 11. Input Common-Mode Voltage vs.
PAGE 8
AD8275 60 +VS 50 +VS – 0.4 3.3V SOURCE CURRENT (mA) 20 10 0 –10 –20 3.3V SINK –30 –40 5V SINK –60 –70 –50 –25 0 25 50 75 100 +VS – 1.6 +VS – 2.0 –VS + 2.0 –VS + 1.6 –VS + 1.2 –VS + 0.8 +25°C –VS 125 Figure 17. Short-Circuit Current vs. Temperature, VS = 3.3 V, 5 V –40°C 0 2 6 8 10 OUTPUT CURRENT (mA) 12 14 1k +85°C +125°C +VS – 0.6 +VS – 0.8 +VS – 1.0 –VS + 1.0 –VS + 0.8 +125°C –VS + 0.6 +85°C –VS + 0.4 +25°C –VS + 0.
PAGE 9
AD8275 40 60 35 50 SLEW RATE (V/µs) 30 OVERSHOOT (%) +SR 25 –SR 20 15 40 3.3V 30 5V 20 10 07546-021 0 –40 –20 0 20 40 60 80 100 07546-024 10 5 0 120 0 20 40 TEMPERATURE (°C) 60 80 100 120 140 160 CAPACITANCE (pF) Figure 26. Small Signal Overshoot vs. Capacitive Load, No Resistive Load Figure 23. Slew Rate vs. Temperature 60 2kΩ 50 OVERSHOOT (%) 20mV/DIV NO LOAD 600Ω 40 3.
PAGE 10
AD8275 1.0 VOUT = 4V p-p 0.1 THD + N (%) 10V/DIV 0.01 RL = 600Ω 10mV/DIV 0.001 RL = 10kΩ 0.0001 10 100 1k 10k FREQUENCY (Hz) Figure 29. Large Signal Pulse Response and Settling Time, RL = 2 kΩ Figure 30. THD + N vs. Frequency, VOUT = 4 V p-p Rev.
PAGE 11
AD8275 THEORY OF OPERATION The AD8275 level translates ±10 V signals at its inputs to 4 V at its output. It does this by attenuating the input signal by 5. A subtractor network performs the attenuation, the level shifting, and the differential-to-single-ended conversion. One benefit of the subtractor topology is that it can accept input signals beyond its supply voltage. The subtractor is composed of tightly matched resistors.
PAGE 12
AD8275 POWER SUPPLIES COMMON-MODE INPUT VOLTAGE RANGE Use a stable dc voltage to power the AD8275. Noise on the supply pins can adversely affect performance. Place a bypass capacitor of 0.1 µF between each supply pin and ground, as close to each pin as possible. A tantalum capacitor of 10 µF should also be used between each supply and ground. It can be farther away from the AD8275 and typically can be shared by other precision integrated circuits.
PAGE 13
AD8275 CONFIGURATIONS Figure 36 and Figure 37, along with Table 6 and Table 7, provide examples of the possible input and output ranges for various supplies and reference voltages. Note that Table 6 and Table 7 list the typical voltage range of the AD8275; these values do not reflect variation over process or temperature. +5V +5V 0.1µF LINEAR VIN RANGE HI VINN 2 HI 7 –SWING 10kΩ –IN LINEAR VIN RANGE HI VINN 2 +SWING +VS 50kΩ 0.
PAGE 14
AD8275 APPLICATIONS INFORMATION ADC FULL SCALE (dB) The AD8275 provides the common-mode rejection that SAR ADCs often lack. In addition, it enables designers to use costeffective, precision, 16-bit ADCs such as the AD7685, yet still condition ±10 V signals. One important factor in selecting an ADC driver is its ability to settle within the acquisition window of the ADC. The AD8275 is able to drive medium speed SAR ADCs. In Figure 38, the 2.
PAGE 15
AD8275 INCREASING INPUT IMPEDANCE USING THE AD8275 AS A LEVEL TRANSLATOR IN A DATA ACQUISITION SYSTEM In applications where a high input impedance is needed, low input bias current op amps can be used to buffer the AD8275. In Figure 41, an AD8620 is used to provide high input impedance. Input bias current is limited to 10 pA. Signal size varies dramatically in some data acquisition applications.
PAGE 16
AD8275 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 1 5.15 4.90 4.65 5 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15° MAX 1.10 MAX 0.40 0.25 6° 0° 0.23 0.09 COMPLIANT TO JEDEC STANDARDS MO-187-AA 0.80 0.55 0.40 10-07-2009-B 0.15 0.05 COPLANARITY 0.10 Figure 44.