Datasheet
AD8555
Rev. A | Page 25 of 28
FILTERING FUNCTION
The AD8555’s FILT/DIGOUT pin can be used to create a sim-
ple low-pass filter. The AD8555’s internal 18 kΩ resistor can be
used with an external capacitor for this purpose. Typical
responses of the AD8555, configured for a gain of 70 and gain
of 1280, are shown in Figure 54 and Figure 55, respectively. This
filtering feature can be used to pass the signals within the filter’s
pass band while limiting the out-of-band signals bandwidth
and, therefore, reducing the noise of the overall solution.
1
2
3
4 5
6
7
8
AD8555
VDD
FILT/DIGOUT
DIGIN
VNEG
VSS
VOUT
VCLAMP
VPOS
V
OUT
VDD
C
FILTER
VDD VSS
04598-0-051
V
IN
Figure 53. AD8555 Configured to Filter Noise
04598-0-052
10 100 1k 10k 50k
dB
40
20
0
C
FILTER
= 0.001
μ
F
C
FILTER
= 0.010
μ
F
C
FILTER
= 0.100
μ
F
Figure 54. Typical Response of the AD8555 at FILT/DIGOUT Pin (Gain = 70)
04598-0-053
100k10 100 1k 10k
dB
60
40
20
0
C
FILTER
= 0.001
μ
F
C
FILTER
= 0.010
μ
F
C
FILTER
= 0.100
μ
F
Figure 55. Typical Response of the AD8555 at FILT/DIGOUT Pin (Gain = 1280)
DRIVING CAPACITIVE LOADS
The AD8555 can drive large capacitive loads. This feature is
useful when the amplifier, placed close to the sensor, has to
drive long cables. Most instrumentation amplifiers have diffi-
culty driving capacitance due to the degradation of the phase
margin caused by the additional phase lag from the capacitive
load. Higher capacitance at the output can increase the amount
of overshoot and ringing in the amplifier’s step response and
could even affect the stability of the device. Additionally, the
value of the capacitive load that an amplifier can drive before
oscillation varies with gain, supply voltage, input signal, and
temperature. Figure 57 and Figure 58 show the overshoot
response of AD8555 versus the capacitive load with a different
value isolation resistor (R
S
) in Figure 56. Similar to all amplifi-
ers, the AD8555 responds with overshoot when driving large
C
L
, but after a point (approximately 22 nF), the overshoot de-
creases. This is because the pole created by C
L
dominates at
first; however, at some point, the pole is farther in than the pole
setting of the buffer amplifier and is ignored by AD8555.
1
2
3
4 5
6
7
8
AD8555
VDD
FILT/DIGOUT
DIGIN
VNEG
VSS
VOUT
VCLAMP
VPOS
VDD
C
L
VDD
V
OUT
VSS
04598-0-054
R
S
C
FILTER
Figure 56. Test Circuit for Driving Capacitive Loads
04598-0-028
LOAD CAPACITANCE (nF)
1000.1 1 10
OVERSHOOT (%)
60
50
40
30
20
10
0
R
S
C
L
= 1nF
OUTPUT
BUFFER
V
S
= ±2.5V
R
S
= 0
R
S
= 10
R
S
= 20
R
S
= 50
R
S
= 100
Figure 57. Positive Overshoot Graph vs. C
L