Datasheet

AD9102 Data Sheet
Rev. 0 | Page 6 of 36
AC SPECIFICATIONS (3.3 V)
T
MIN
to T
MAX
; AVDD = 3.3 V; DVDD = 3.3 V, CLKVDD = 3.3 V, internal CLDO, DLDO1, and DLDO2; I
OUTFS
= 8 mA; maximum sample rate,
unless otherwise noted.
Table 6.
Parameter Min Typ Max Unit
SPURIOUS FREE DYNAMIC RANGE
f
DAC
= 180 MSPS, f
OUT
= 10 MHz 87 dBc
f
DAC
= 180 MSPS, f
OUT
= 50 MHz 67 dBc
TWO-TONE INTERMODULATION DISTORTION (IMD)
f
DAC
= 180 MSPS, f
OUT
= 10 MHz 88 dBc
f
DAC
= 180 MSPS, f
OUT
= 50 MHz 68 dBc
NSD
f
DAC
= 180 MSPS, f
OUT
= 50 MHz −163 dBm/Hz
PHASE NOISE @ 1 kHz FROM CARRIER
f
DAC
= 180 MSPS, f
OUT
= 10 MHz −150 dBc/Hz
DYNAMIC PERFORMANCE
Output Settling Time, Full-Scale Output Step (to 0.1%)
1
31.2 ns
Trigger to Output Delay, f
DAC
= 180 MSPS
2
96 ns
Rise Time, Full-Scale Swing
1
3.25 ns
Fall Time, Full-Scale Swing
1
3.26 ns
1
Based on 85 Ω resistors from DAC output terminals to ground.
2
Start delay = 0 f
DAC
clock cycles.
AC SPECIFICATIONS (1.8 V)
T
MIN
to T
MAX
; AVDD = 1.8 V; DVDD = DLDO1 = DLDO2 = 1.8 V, CLKVDD = CLDO = 1.8 V; I
OUTFS
= 4 mA; maximum sample rate, unless
otherwise noted.
Table 7.
Parameter
Min
Typ
Max
Unit
SPURIOUS FREE DYNAMIC RANGE (SFDR)
f
DAC
= 180 MSPS, f
OUT
= 10 MHz 84 dBc
f
DAC
= 180 MSPS, f
OUT
= 50 MHz 73 dBc
TWO-TONE INTERMODULATION DISTORTION (IMD)
f
DAC
= 180 MSPS, f
OUT
= 10 MHz
91
dBc
f
DAC
= 180 MSPS, f
OUT
= 50 MHz 86 dBc
NSD
f
DAC
= 180 MSPS, f
OUT
= 50 MHz
−163
dBm/Hz
PHASE NOISE @ 1kHz FROM CARRIER
f
DAC
= 180 MSPS, f
OUT
= 10 MHz −150 dBc/Hz
DYNAMIC PERFORMANCE
Output Settling Time (to 0.1%)
1
31.2 ns
Trigger to Output Delay, f
DAC
= 180 MSPS2
2
96
ns
Rise Time
1
3.25 ns
Fall Time
1
3.26 ns
1
Based on 85 Ω resistors from DAC output terminals to ground.
2
Start delay = 0 f
DAC
clock cycles.