Datasheet

AD9222 Data Sheet
Rev. F | Page 46 of 60
CRYSTAL_3
GND
OE
OUT
VCC
OE
GNDOUT
VCC
CLK
CLKB
GND
GND_PAD
OUT0
OUT0B
OUT1
OUT1B
RSET
S0
S1
S10
S2
S3
S4
S5
S6
S7
S8
S9
SYNCB
VREF
VS
SIGNAL=DNC;27,28
DNP
DNP
DNP
DNP
DNP
DNP
DNP
DNP
Input
Encode
Enc
Enc
Clock Circuit
DNP
DNP
DNP
DNP
DISABLE OSC401
ENABLE OSC401
Optional Clock
Oscillator
AD9515 Pin−strap settings
OPTIONAL CLOCK DRIVE CIRCUIT
LVPECL OUTPUT
DNP: DO NOT POPULATE.
DNP
DNP
DNP
LVDS OUTPUT
CLIP SINE OUT (DEFAULT)
DNP
12
6
7
25
8
16
9
15
10
14
11
13
3
2
5
18
19
23
22
32
1
31
33
U401
SIGNAL=AVDD_3.3V;4,17,20,21,24,26,29,30
AD9515BCPZ
0
R430
R446
0
R424
R428
0
R425
0
R427
0
1
2
3
J401
10
12 3
5
7
1
8
14
OSC401
0
R426
S0
0
R436
R437
0
10k
R413
C401
0.1µF
R401
10k
R403
0
DNP
0.1µF
514C
214C
0.1µF
C416
C411
0.1µF
0
R406
0
R415
10k
R402
49.9
R411
R407
0
0
R434
C405
0.1µF
DNP
0.1µF
C406
DNP
0.1µF
C407
DNP
C408
0.1µF
DNP
R444
0
0
R442
R440
0
0
R438
R432
0
0
R445
R443
0
0
R441
R439
0
R435
0
0
R433
R431
0
0
R429
S4
1
E401
AVDD_3.3V
0
R416
3
2
1
CR401
HSMS-2812-TR1G
R414
4.12k
S5
S3
S2
S1
AVDD_3.3V
R421
240
C409
0.1µF
R409
DNP
240
R420
6
5
43
2
1
T401
0.1µF
C402
C410
0.1µF
49.9
R404
R410
10k
R412
DNP
DNP
R408
R405
0
C403
0.1µF
100
R423
R422
100
R418
0
R417
0
S0
S1S2
S3
S4S5S6S7
S8S9
S10
OPT_CLK
OPT_CLK
CLK
AVDD_3.3V
OPT_CLK
OPT_CLK
CLK
CLK
CLK
AVDD_3.3V
AVDD_3.3V
AVDD_3.3V
AVDD_3.3V
AVDD_3.3V
AVDD_3.3V
AVDD_3.3V
AVDD_3.3V
AVDD_3.3V
AVDD_3.3V
AVDD_3.3V
S6
S7
S8
S9
S10
C413
0.1µF0.1µF
814C4
1
4C
0.1µF0.1µF
C417
AVDD_3.3V
AVDD_3.3V
P401
P402
05967-075
0.1µF
Figure 93. Evaluation Board Schematic, Clock Circuitry