Datasheet

AD9230-11
Rev. 0 | Page 15 of 28
EQUIVALENT CIRCUITS
1.2V
10kΩ 10kΩ
CLK+
CLK–
AVDD
07101-006
Figure 15. Clock Inputs
V
IN+
AVDD
BUF
VIN–
AVDD
BUF
2kΩ
2kΩ
BUF
AVDD
V
CML
~1.4V
0
7101-007
Figure 16. Analog Inputs (V
CML
= ~1.4 V)
SCLK/DFS
RESET
PWDN
1kΩ
07101-008
25kΩ
AVDD
Figure 17. Equivalent SCLK/DFS, RESET, PWDN Input Circuit
1kΩ
25kΩ
AVDD
07101-009
CSB
Figure 18. Equivalent CSB Input Circuit
DRVDD
Dx+
V–
V+
Dx–
V+
V–
0
7101-010
Figure 19. LVDS Outputs (Dx+, Dx−, OR+, OR−, DCO+, DCO−)
SDIO/DCS
1kΩ
DRVDD
07101-011
25kΩ
Figure 20. Equivalent SDIO/DCS Input Circuit