Datasheet
Evaluation Board User Guide UG-191
Rev. 0 | Page 13 of 24
09346-017
OPTIONAL CLOCK B INPUT
OPTIONAL CRYSTAL OSCIALLATOR CLOCK SOURCE
OPTIONAL TERMINATION NEAR DUT
= CLK-
SILKSCREEN ON BOARD
SILKSCREEN ON BOARD
= CLK+
LAYOUT: SMA'S SHOULD BE 540 MILS CENTER TO CENTER
CLK_A +
CLK_A -
LAYOUT: SMA'S SHOULD BE 540 MILS CENTER TO CENTER
CLK_B +
OPTIONAL TERMINATION NEAR DUT
XFMR / BALUN CLK CIRCUITRY
SHARE PADS?
SHARE PADS?
CLK_B -
SHARE PADS SHARE PADS
CLOCK
0.1UF
C515
XSTAL_IN+
XSTAL_IN-
DNI
500MHZ
Y505
3
2
4
5
1
6
1.00K
R525
75
DNI
CR503
CR501
R511
R513
R527
R529
R526
R528
C503
C511
R524
R522R520
C514
R518
C516
R523
R521
R519
C513
6
4
2
3
1
T503
R516
R517
C509
C510
R514
5432
1
J503
5432
1
J504
1
3
6
4
5 2
T504
C512
TP502
R515
C506
R506
R505
R509
C507
R512
C508
R510
R507
R508
C505
6
4
2
3
1
T501
T502
R503
C501
R504
C504
C502
TP501
R501
5432
1
J501
5432
1
J502
R502
C517
DNI
MABA-007159-000000
1000PF
HMPS-2822-BLK
HMPS-2822-BLK
0
MABA-007159-000000
0
DNI
ADT1-1WT+
0
0.1UF
0.1UF
DNI
0.1UF
1000PF
BLK
0.1UF
DNI
0.1UF
ENC_B-
24.9
0.1UF
49.9
DNI
0.1UF
49.9
BLK
DNI
24.9
3.3V_CLK
DNI
ADT1-1WT+
DNI
DNI
0.1UF
0
DNI
DNI
49.9
0.1UF
100
DNI
100
DNI
ENC_A+
XSTAL_IN+
ENC_A-
XSTAL_IN-
DNI
0.1UF
24.9
0.1UF
0.1UF
DNI
0.1UF
0
DNI0
0
75
130130
0.1UF
24.9
0
49.9
DNI
0
0
0
0
0
ENC_B+
0
DNI
DNIDNI
DNI
DNI
Q_N
Q
VDD
GND
NC
TRISTATE
GND
GND
GND
GND
GND
GND
SECPRI
-(NC)-
GND
GND
GND
GND
GND
SECPRI
-(NC)-
GND
GND
GND
GND
GND
Figure 17. Default Clock Path Input Circuits