Datasheet

AD9287 Data Sheet
Rev. E | Page 4 of 52
SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −0.5 dBFS, unless otherwise noted.
Table 1.
Parameter
1
Temp Min Typ Max Unit
RESOLUTION 8 Bits
ACCURACY
No Missing Codes Full Guaranteed
Offset Error Full ±5 ±23.4 mV
Offset Matching Full ±5 ±23.4 mV
Gain Error Full ±6 % FS
Gain Matching Full ±0.5 ±2 % FS
Differential Nonlinearity (DNL) Full ±0.2 ±0.8 LSB
Integral Nonlinearity (INL) Full ±0.2 ±0.65 LSB
TEMPERATURE DRIFT
Offset Error Full ±2 ppm/°C
Gain Error Full ±17 ppm/°C
Reference Voltage (1 V Mode) Full ±21 ppm/°C
REFERENCE
Output Voltage Error (V
REF
= 1 V) Full ±5 ±30 mV
Load Regulation at 1.0 mA (V
REF
= 1 V) Full 3 mV
Input Resistance Full 6 kΩ
ANALOG INPUTS
Differential Input Voltage (V
REF
= 1 V) Full 2 V p-p
Common-Mode Voltage Full AVDD/2 V
Differential Input Capacitance Full 7 pF
Analog Bandwidth, Full Power Full 295 MHz
POWER SUPPLY
AVDD Full 1.7 1.8 1.9 V
DRVDD Full 1.7 1.8 1.9 V
I
AVDD
Full 260 274 mA
I
DRVDD
Full 34.5 38 mA
Total Power Dissipation (Including Output Drivers) Full 530 562 mW
Power-Down Dissipation Full 2 4 mW
Standby Dissipation
2
Full 72 mW
CROSSTALK Full −100 dB
CROSSTALK (Overrange Condition)
3
Full −100 dB
1
See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, at www.analog.com for definitions and for details on how these tests were
completed.
2
Can be controlled via the SPI.
3
Overrange condition is specific with 6 dB of the full-scale input range.