Datasheet

Data Sheet AD9287
Rev. E | Page 41 of 52
MODE PIN
POSITIVE GAIN SLOPE = 0V TO 1.0V
NEGATIVE GAIN SLOPE = 2.25V TO 5.0V
HILO PIN
HI GAIN RANGE = 2.25V TO 5.0V
LO GAIN RANGE = 0V TO 1.0V
R414
10kΩ
L410 120nH
C420
0.018µF
C415
0.018µF
R415
274Ω
C410 0.1µF
C425 0.1µF
C423 0.1µF
C424
0.1µF
L409 120nH
C418
22pF
C417 0.1µF
C416
0.1µF
C414
0.1µF
R417
10kΩ
C421
22pF
C419
0.1µF
C422 0.1µF
INH2 INH1
AVDD_5V
AVDD_5V
C426 10µF
C413
10µF
OPTIONAL VGA DRIVE CIRCUIT FOR CHANNEL A AND CHANNEL B
C409
0.1µF
R411
10kΩ
R412
10kΩ
DNP
C403
DNP
L404
0Ω
R403
DNP
L408
0Ω
24
17
20
23
18
22
19
21
R404
DNP
L406 0Ω
L405 0Ω
L402 0Ω
L403
0Ω
L407
0Ω
C408 0.1µF
C407
0.1µF
C406 0.1µF
C405
0.1µF
R410 187Ω
R409 187Ω
R408
187Ω
R407
187Ω
C402
DNP
L401 0Ω
C401
DNP
R405
374Ω
R406
374Ω
CH_A
CH_B
CH_B
CH_A
AVDD_5V
AVDD_5V
AVDD_5V
C404
DNP
R401
DNP
R402 DNP
31
10
26 25
14
27
3
6
4
5
1
8
32
9
15 16
VG
28
13
29
12
30
11
2
7
COM1
COM2
ENBL ENBV
GAIN
HILO
INH1
INH2
LMD1
LMD2
LON1
LON2
LOP1
LOP2
MODE
NC
RCLMP
VCM1
VCM2
VIN1
VIN2
VIP1
VIP2
VOH1
VOH2
VOL1
VOL2
VPS1
VPS2
VPSV
AD8332
U401
COMM
COMM
R413 10kΩ DNP
R424 10kΩ DNP
C412
0.1µF
C411
1000pF
RCLAMP PIN
HILO PIN = LO = ±50mV
HILO PIN = H = ±75mV
POWER DOWN ENABLE
(0V TO 1V = DISABLE POWER)
R416
274Ω
POPULATE L401 TO L408 WITH
0Ω RESISTORS OR DESIGN
YOUR OWN FILTER.
Y1
VCC
Y2A2
GND A1
SPI CIRCUITRY FROM FIFO
SDIO_ODM
AVDD_DUT
R431
1kΩ
R432
1kΩ
R433 1kΩ
AVDD_3.3V
1 2 3 4
5 6
NC7WZ07
U403
R425
10kΩ
AVDD_DUT
RESET/REPROGRAM
1 2
3 4
S401
+3.3V = NORMAL OPERATION = AVDD_3.3V +5V = PROGRAMMING = AVDD_5V
AVDD_5V
AVDD_3.3V
J402
C427
0.1µF
R418
4.75kΩ
PIC12F629
R419 261Ω
4
3
1
2
5 6 8 7
U402
CR401
GP0
GP1
GP2
GP4
GP5 VDD
VSS
MCLR/ GP3
REMOVE WHEN USING OR PROGRAMMING PIC (U402)
R427
0Ω
R420
0Ω
R428
0Ω
R426
0Ω
SDO_CHA
SDI_CHA
SCLK_CHA
CSB1_CHA
C429 0.1µF
SCLK_DTP CSB_DUT AVDD_DUT
Y1
VCC
Y2A2
GND A1
1 2 3 4
5 6
U404
R430
10kΩ
R429
10kΩ
NC7WZ16
C428 0.1µF
PIC PROGRAMMING HEADER
MCLR/GP3
GP0
GP1
PICVCC
MCLR/GP3
GP0
GP1
PICVCC
9
7
5
3
1
10
8
6
4
2
J401
E401
R421
0Ω, DNP
R423
0Ω, DNP
R422
0Ω, DNP
OPTIONAL
DNP: DO NOT POPULATE
05966-018
Figure 65. Evaluation Board Schematic, Optional DUT Analog Input Drive and SPI Interface Circuit (Continued)