Datasheet

AD9481
Rev. 0 | Page 4 of 28
DIGITAL SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V; T
MIN
= −40°C, T
MAX
= +85°C, A
IN
= −1 dBFS, full scale = 1.0 V, internal reference, differential analog and
clock inputs, unless otherwise noted.
Table 2.
AD9481-250
Parameter Temp Test Level Min Typ Max Unit
CLOCK AND DS INPUTS (CLK+, CLK−, DS+, DS−)
Differential Input Full IV 200 mV p-p
Common-Mode Voltage
1
Full VI 1.38 1.5 1.68 V
Input Resistance Full VI 4.2 5.5 6.0 kΩ
Input Capacitance 25°C V 4 pF
LOGIC INPUTS (PDWN, S1)
Logic 1 Voltage Full IV 2.0 V
Logic 0 Voltage Full IV 0.8 V
Logic 1 Input Current Full VI ±160 µA
Logic 0 input Current Full VI 10 µA
Input Resistance 25°C V 30 kΩ
Input Capacitance 25°C V 4 pF
DIGITAL OUTPUTS
Logic 1 Voltage
2
Full VI DRVDD − 0.05 mV
Logic 0 Voltage Full VI 0.05 V
Output Coding Full IV Twos complement or binary
1
The common mode for CLOCK inputs can be externally set, such that 0.9 V < CLK ± < 2.6 V.
2
Capacitive loading only.