Datasheet

AD9516-3 Data Sheet
Rev. C | Page 6 of 80
CLOCK INPUTS
Table 3.
Parameter Min Typ Max Unit Test Conditions/Comments
CLOCK INPUTS (CLK,
CLK
)
Differential input
Input Frequency 0
1
2.4 GHz High frequency distribution (VCO divider)
0
1
1.6 GHz Distribution only (VCO divider bypassed)
Input Sensitivity, Differential 150 mV p-p Measured at 2.4 GHz; jitter performance is
improved with slew rates > 1 V/ns
Input Level, Differential 2 V p-p Larger voltage swings may turn on the protection
diodes and may degrade jitter performance
Input Common-Mode Voltage, V
CM
1.3 1.57 1.8 V Self-biased; enables ac coupling
Input Common-Mode Range, V
CMR
1.3 1.8 V With 200 mV p-p signal applied; dc-coupled
Input Sensitivity, Single-Ended 150 mV p-p CLK ac-coupled;
CLK
ac-bypassed to RF ground
Input Resistance 3.9 4.7 5.7 kΩ Self-biased
Input Capacitance
2
pF
1
Below about 1 MHz, the input should be dc-coupled. Care should be taken to match V
CM
.
CLOCK OUTPUTS
Table 4.
Parameter Min Typ Max Unit Test Conditions/Comments
LVPECL CLOCK OUTPUTS Termination = 50 Ω to V
S
− 2 V
OUT0, OUT1, OUT2, OUT3, OUT4, OUT5 Differential (OUT,
OUT
)
Output Frequency, Maximum 2950 MHz Using direct to output; see Figure 25 for peak-to-
peak differential amplitude
Output High Voltage (V
OH
) V
S
− 1.12 V
S
− 0.98 V
S
− 0.84 V
Output Low Voltage (V
OL
) V
S
− 2.03 V
S
− 1.77 V
S
− 1.49 V
Output Differential Voltage (V
OD
) 550 790 980 mV V
OH
− V
OL
for each leg of a differential pair for
default amplitude setting with driver not toggling;
see Figure 25 for variation over frequency
LVDS CLOCK OUTPUTS Differential termination 100 Ω at 3.5 mA
OUT6, OUT7, OUT8, OUT9 Differential (OUT,
OUT
)
Output Frequency 800 MHz The AD9516 outputs toggle at higher frequencies,
but the output amplitude may not meet the V
OD
specification; see Figure 26
Differential Output Voltage (V
OD
) 247 360 454 mV V
OH
− V
OL
measurement across a differential pair at
the default amplitude setting with output driver
not toggling; see Figure 26 for variation over
frequency
Delta V
OD
25 mV This is the absolute value of the difference
between V
OD
when the normal output is high vs.
when the complementary output is high
Output Offset Voltage (V
OS
)
1.125
1.24
1.375
V
(V
OH
+ V
OL
)/2 across a differential pair
Delta V
OS
25 mV This is the absolute value of the difference
between V
OS
when the normal output is high vs.
when the complementary output is high
Short-Circuit Current (I
SA
, I
SB
) 14 24 mA Output shorted to GND
CMOS CLOCK OUTPUTS
OUT6A, OUT6B, OUT7A, OUT7B,
OUT8A, OUT8B, OUT9A, OUT9B
Single-ended; termination = 10 pF
Output Frequency 250 MHz See Figure 27
Output Voltage High (V
OH
) V
S
− 0.1 V At 1 mA load
Output Voltage Low (V
OL
) 0.1 V At 1 mA load