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Data Sheet AD9516-3

Rev. C | Page 71 of 80

Table 57. LVDS/CMOS Outputs

Reg.

Addr.

(Hex) Bits Name Description

0x140 [7:5] OUT6 output polarity In CMOS mode, Bits[7:5] select the output polarity of each CMOS output.

In LVDS mode, only Bit 5 determines LVDS polarity.

7 6 5 OUT4A (CMOS) OUT4B (CMOS) OUT4 (LVDS)

0 0 0 Noninverting Inverting Noninverting

0 1 0 Noninverting Noninverting Noninverting (default)

1 0 0 Inverting Inverting Noninverting

1 1 0 Inverting Noninverting Noninverting

0 0 1 Inverting Noninverting Inverting

0 1 1 Inverting Inverting Inverting

1 0 1 Noninverting Noninverting Inverting

1 1 1 Noninverting Inverting Inverting

4 OUT6 CMOS B In CMOS mode, turns on/off the CMOS B output. There is no effect in LVDS mode.

0: turns off the CMOS B output (default).

1: turns on the CMOS B output.

3 OUT6 select LVDS/CMOS Selects LVDS or CMOS logic levels.

0: LVDS (default).

1: CMOS.

[2:1] OUT6 LVDS output current Set output current level in LVDS mode. This has no effect in CMOS mode.

2 1 Current (mA) Recommended Termination (Ω)

0 0 1.75 100

0 1 3.5 100 (default)

1 0 5.25 50

1 1 7 50

0 OUT6 power-down Power-down output (LVDS/CMOS).

0: power on (default).

1: power off.

0x141 [7:5] OUT7 output polarity In CMOS mode, Bits[7:5] select the output polarity of each CMOS output.