Datasheet

Data Sheet AD9524
Rev. D | Page 41 of 56
Addr
(Hex)
Register
Name
(MSB)
Bit 7
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
(LSB)
Bit 0
Default
Value
(Hex)
0x1BA
PLL1 output
control
Reserved Reserved Reserved
PLL1 output
CMOS driver
strength
PLL1 output divider 0x00
0x1BB
PLL1 output
channel
control
PLL1
output
driver
power-
down
Reserved Reserved Reserved Reserved Reserved
Route VCXO
clock to Ch 1
divider input
Route VCXO
clock to Ch 0
divider input
0x80
Readback
0x22C Readback 0
Status
PLL2
reference
clock
Status
PLL1
feedback
clock
Status
VCXO
Status
REF_TEST
Status
REFB
Status
REFA
Lock detect
PLL2
Lock detect
PLL1
0x22D Readback 1 Reserved Reserved Reserved Reserved
Holdover
active
Selected
reference
(in auto
mode)
Reserved
VCO
calibration
in progress
Other
0x230 Status signals Reserved Reserved Status Monitor 0 control 0x00
0x231 Reserved Reserved Status Monitor 1 control 0x00
0x232 Reserved Reserved Reserved
Enable Status_
EEPROM on
STATUS0 pin
STATUS1
pin
divider
enable
STATUS0
pin
divider
enable
Reserved
Sync dividers
(manual
control)
0: sync signal
inactive
1: dividers
held in sync
(same
as
SYNC
pin
low)
0x00
0x233
Power-down
control
Reserved Reserved Reserved Reserved Reserved
PLL1
power-
down
PLL2
power-down
Distribution
power-down
0x07
0x234
Update all
registers
Reserved IO_Update 0x00
EEPROM Buffer
0xA00
EEPROM
Buffer Segment
Register 1 to
EEPROM
Buffer Segment
Register 3
Instruction (data)[7:0] (serial port configuration register) 0x00
0xA01 High byte of register address (serial port configuration register) 0x00
0xA02 Low byte of register address (serial port configuration register) 0x00
0xA03
EEPROM
Buffer Segment
Register 4 to
EEPROM
Buffer Segment
Register 6
Instruction (data)[7:0] (reaback control register) 0x02
0xA04 High byte of register address (reaback control register) 0x00
0xA05 Low byte of register address (reaback control register) 0x04
0xA06
EEPROM
Buffer Segment
Register 7 to
EEPROM
Buffer Segment
Register 9
Instruction (data)[7:0] (PLL segment) 0x0E
0xA07
High byte of register address (PLL segment)
0x00
0xA08
Low byte of register address (PLL segment)
0x10
0xA09
EEPROM
Buffer Segment
Register 10 to
EEPROM
Buffer Segment
Register 12
Instruction (data)[7:0] (PECL/CMOS output segment) 0x0E
0xA0A High byte of register address (PECL/CMOS output segment) 0x00
0xA0B Low byte of register address (PECL/CMOS output segment) 0xF0