Datasheet

Data Sheet AD9524
Rev. D | Page 55 of 56
Table 61. EEPROM Control 1
Address Bits Bit Name Description
0xB02 [7:2] Reserved Reserved.
1
Soft_EEPROM
When the EEPROM_SEL pin is tied low, setting the Soft_EEPROM bit resets the AD9524 using
the settings saved in EEPROM.
1: soft reset with EEPROM settings (self-clearing).
0 Enable EEPROM write Enables the user to write to the EEPROM.
0: EEPROM write protection is enabled. User cannot write to EEPROM (default).
1: EEPROM write protection is disabled. User can write to EEPROM.
Table 62. EEPROM Control 2
Address Bits Bit Name Description
0xB03 [7:1] Reserved Reserved.
0 REG2EEPROM Transfers data from the buffer register to the EEPROM (self-clearing).
1: setting this bit initiates the data transfer from the buffer register to the EEPROM (writing
process); it is reset by the I²C master after the data transfer is done.