Datasheet

AD9557 Data Sheet
Rev. B | Page 90 of 92
Table 124. Multifunction Pin Output Functions (D7 = 1)
Register Value Output Function Equivalent Status Register
0x80
Static Logic 0 None
0x81
Static Logic 1 None
0x82 System clock divided by 32 None
0x83
Watchdog timer output None
0x84 EEPROM upload in progress Register 0x0D00, Bit 0
0x85
EEPROM download in progress Register 0x0D00, Bit 1
0x86 EEPROM fault detected Register 0x0D00, Bit 2
0x87
SYSCLK PLL lock detected Register 0x0D01, Bit 0
0x88 SYSCLK PLL stable Register 0x0D01, Bit 1
0x89
Output PLL locked
Register 0x0D01, Bit 2
0x8A APLL calibration in process Register 0x0D01, Bit 3
0x8B
APLL input reference present Register 0x0D01, Bit 4
0x8C All PLLs locked Register 0x0D01, Bit 5
(DPLL phase lock) and (APLL lock) and (sys PLL lock)
0x8D (DPLL phase lock) and (APLL lock) Register 0x0D01, Bit 6
0x8E
Reserved
0x8F Reserved
0x90
DPLL free run Register 0x0D08, Bit 0
0x91 DPLL active Register 0x0D08, Bit 1
0x92
DPLL in holdover Register 0x0D08, Bit 2
0x93
DPLL in reference switchover
Register 0x0D08, Bit 3
0x94 DPLL phase locked Register 0x0D08, Bit 4
0x95
DPLL frequency locked Register 0x0D08, Bit 5
0x96 DPLL phase slew limited Register 0x0D08, Bit 6
0x97
DPLL frequency clamped Register 0x0D09, Bit 5
0x98
Tuning word history available Register 0x0D09, Bit 4
0x99
Tuning word history updated
Register 0x0D05, Bit 4
0x9A to 0x9F Reserved
0xA0
Reference A fault Register 0x0D0B, Bit 2
0xA1
Reference B fault Register 0x0D0B, Bit 6
0xA2
Reserved
0xA3
Reserved
0xA4 to Ax2F
Reserved
0xB0 Reference A valid Register 0x0D0B, Bit 3
0xB1
Reference B valid Register 0x0D0B, Bit 7
0xB2
Reserved
0xB3
Reserved
0xB4 to 0xBF
Reserved
0xC0 Reference A active Register 0x0D09, Bit 0
0xC1 Reference B active Register 0x0D09, Bit 0
0xC2
Reserved
0xC3 Reserved
0xC4 to 0xCF
Reserved
0xD0 Clock distribution sync pulse Register 0x0D03, Bit 3
0xD1
Soft pin configuration in process Register 0x0D03, Bit 4
0xD2 to 0xFF Reserved