Datasheet

AD9558 Data Sheet
Rev. B | Page 24 of 104
–0.2
0.2
0.6
1.0
1.4
1.8
2.2
2.6
3.0
3.4
–1
0
1
2 3
4
5
6
7 8
9
10 1
1
12
13
14
15
AMPLITUDE (V)
TIME (ns)
10pF LOAD
2pF LOAD
09758-126
Figure 25. Output Waveform,
3.3 V CMOS (100 MHz, Strong Mode)
–1
0
1
2 3
4
5
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7 8
9
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13 14
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AMPLITUDE (V)
TIME (ns)
09758-127
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0.5
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0.9
1.1
1.3
1.5
1.7
1.9
10pF LOAD
2pF LOAD
Figure 26. Output Waveform, 1.8 V CMOS (100 MHz)
0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
–5 5 15 25 35 45 55 65 75 85 95
AMPLITUDE (V)
TIME (ns)
09758-128
10pF LOAD
2pF LOAD
Figure 27. Output Waveform, 3.3 V CMOS (20 MHz, Weak Mode)
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–27
–24
–21
–18
–15
–12
–9
–6
–3
0
3
10
100 1k 10k 100k
LOOP BW = 100Hz;
HIGH PHASE MARGIN;
PEAKING: 0.06dB; –3dB: 69Hz
LOOP BW = 2kHz;
HIGH PHASE MARGIN;
PEAKING: 0.097dB; –3dB: 1.23kHz
LOOP BW = 5kHz;
HIGH PHASE MARGIN;
PEAKING: 0.14dB; –3dB: 4.27kHz
09758-129
FREQUENC
Y
OFFSET (Hz)
LOOP
GAIN (dB)
Figure 28. Closed-Loop Transfer Function for 100 Hz, 2 kHz, and 5 kHz Loop
Bandwidth Settings; High Phase Margin Loop Filter Setting
(This is compliant with Telcordia GR-253 jitter transfer test for loop
bandwidths < 2 kHz.)
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–27
–24
–21
–18
–15
–12
–9
–6
–3
0
3
10 100 1k
FREQUENCY OFFSET (Hz)
LOO
P GAIN (dB)
10k 100k
09758-230
LOOP BW = 100Hz;
NORMAL PHASE MARGIN;
PEAKING: 0.09dB; –3dB: 117Hz
LOOP BW = 2kHz;
NORMAL PHASE MARGIN;
PEAKING: 1.6dB; –3dB: 2.69kHz
Figure 29. Closed-Loop Transfer Function for 100 Hz and 2 kHz Loop
Bandwidth Settings; Normal Phase Margin Loop Filter Setting