Datasheet

Data Sheet AD9613
Rev. C | Page 13 of 36
Pin No. Mnemonic Type Description
Digital Outputs
14 D0+ (LSB) Output Channel A/Channel B LVDS Output Data 0True.
13
D0− (LSB)
Output
Channel A/Channel B LVDS Output Data 0Complement.
16 D1+ Output Channel A/Channel B LVDS Output Data 1True.
15 D1− Output Channel A/Channel B LVDS Output Data 1Complement.
18 D2+ Output Channel A/Channel B LVDS Output Data 2True.
17 D2− Output Channel A/Channel B LVDS Output Data 2Complement.
21 D3+ Output Channel A/Channel B LVDS Output Data 3True.
20 D3− Output Channel A/Channel B LVDS Output Data 3Complement.
23 D4+ Output Channel A/Channel B LVDS Output Data 4True.
22 D4− Output Channel A/Channel B LVDS Output Data 4Complement.
27 D5+ Output Channel A/Channel B LVDS Output Data 5True.
26 D5− Output Channel A/Channel B LVDS Output Data 5—Complement.
30 D6+ Output Channel A/Channel B LVDS Output Data 6True.
29
D6−
Output
Channel A/Channel B LVDS Output Data 6Complement.
32 D7+ Output Channel A/Channel B LVDS Output Data 7True.
31 D7− Output Channel A/Channel B LVDS Output Data 7—Complement.
34 D8+ Output Channel A/Channel B LVDS Output Data 8True.
33 D8− Output Channel A/Channel B LVDS Output Data 8Complement.
36 D9+ Output Channel A/Channel B LVDS Output Data 9True.
35 D9− Output Channel A/Channel B LVDS Output Data 9Complement.
39 D10+ Output Channel A/Channel B LVDS Output Data 10True.
38 D10− Output Channel A/Channel B LVDS Output Data 10Complement.
41 D11+ (MSB) Output Channel A/Channel B LVDS Output Data 11True.
40 D11− (MSB) Output Channel A/Channel B LVDS Output Data 11Complement.
43 OR+ Output Channel A/Channel B LVDS OverrangeTrue.
42 OR− Output Channel A/Channel B LVDS OverrangeComplement.
25 DCO+ Output Channel A/Channel B LVDS Data Clock OutputTrue.
24 DCO− Output Channel A/Channel B LVDS Data Clock OutputComplement.
SPI Control
45 SCLK Input SPI Serial Clock.
44 SDIO Input/Output SPI Serial Data I/O.
46 CSB Input SPI Chip Select (Active Low).
Output Enable Bar and
Power-Down
47 OEB Input/Output Output Enable Bar Input (Active Low).
48 PDWN
Input/Output Power-Down Input (Active High). Operation depends upon SPI mode;
this input can be configured as power-down or standby. For further
description, refer to Table 14.