Datasheet

AD9627
Rev. B | Page 17 of 76
Pin No. Mnemonic Type Description
Digital Input
52 SYNC Input Digital Synchronization Pin. Slave mode only.
Digital Outputs
14 D0A (LSB) Output Channel A CMOS Output Data.
15 D1A Output Channel A CMOS Output Data.
16 D2A Output Channel A CMOS Output Data.
17 D3A Output Channel A CMOS Output Data.
18 D4A Output Channel A CMOS Output Data.
19 D5A Output Channel A CMOS Output Data.
22 D6A Output Channel A CMOS Output Data.
23 D7A Output Channel A CMOS Output Data.
25 D8A Output Channel A CMOS Output Data.
26 D9A Output Channel A CMOS Output Data.
27 D10A Output Channel A CMOS Output Data.
28 D11A (MSB) Output Channel A CMOS Output Data.
60 D0B (LSB) Output Channel B CMOS Output Data.
61 D1B Output Channel B CMOS Output Data.
62 D2B Output Channel B CMOS Output Data.
63 D3B Output Channel B CMOS Output Data.
2 D4B Output Channel B CMOS Output Data.
3 D5B Output Channel B CMOS Output Data.
4 D6B Output Channel B CMOS Output Data.
5 D7B Output Channel B CMOS Output Data.
6 D8B Output Channel B CMOS Output Data.
7 D9B Output Channel B CMOS Output Data.
8 D10B Output Channel B CMOS Output Data.
9 D11B (MSB) Output Channel B CMOS Output Data.
11 DCOA Output Channel A Data Clock Output.
10 DCOB Output Channel B Data Clock Output.
SPI Control
48 SCLK/DFS Input SPI Serial Clock/Data Format Select Pin in External Pin Mode.
47 SDIO/DCS Input/Output SPI Serial Data I/O/Duty Cycle Stabilizer Pin in External Pin Mode.
51 CSB Input SPI Chip Select (Active Low).
Signal Monitor Port
33 SMI SDO/OEB Input/Output Signal Monitor Serial Data Output/Output Enable Input (Active Low) in External Pin Mode.
35 SMI SDFS Output Signal Monitor Serial Data Frame Sync.
34 SMI SCLK/PDWN Input/Output Signal Monitor Serial Clock Output/Power-Down Input in External Pin Mode.