Datasheet
AD9627
Rev. B | Page 28 of 76
VOLTAGE REFERENCE
A stable and accurate voltage reference is built into the AD9627.
The input range can be adjusted by varying the reference voltage
applied to the AD9627, using either the internal reference or an
externally applied reference voltage. The input span of the ADC
tracks reference voltage changes linearly. The various reference
modes are summarized in the sections that follow. The Reference
Decoupling section describes the best practices PCB layout of
the reference.
Internal Reference Connection
A comparator within the AD9627 detects the potential at the
SENSE pin and configures the reference into four possible
modes, which are summarized in Table 14. If SENSE is grounded,
the reference amplifier switch is connected to the internal resistor
divider (see Figure 51), setting VREF to 1.0 V. Connecting the
SENSE pin to VREF switches the reference amplifier output
to the SENSE pin, completing the loop and providing a 0.5 V
reference output.
VREF
SENSE
0.5V
AD9627
SELECT
LOGIC
0.1µF1.0µF
VIN–A/VIN–B
VIN+A/VIN+B
ADC
CORE
0
6571-051
Figure 51. Internal Reference Configuration
If a resistor divider is connected external to the chip, as shown
in Figure 52, the switch again sets to the SENSE pin. This puts
the reference amplifier in a noninverting mode with the VREF
output defined as follows:
R1
R2
VREF 15.0
The input range of the ADC always equals twice the voltage at
the reference pin for either an internal or an external reference.
0.5V
AD9627
SELECT
LOGIC
VIN–A/VIN–B
VIN+A/VIN+B
ADC
CORE
VREF
SENSE
0.1µF1.0µF
R2
R1
0
6571-052
Figure 52. Programmable Reference Configuration
If the internal reference of the AD9627 is used to drive multiple
converters to improve gain matching, the loading of the reference
by the other converters must be considered. Figure 53 shows
how the internal reference voltage is affected by loading.
0
–1.25
02.0
LOAD CURRENT (mA)
REFERENCE VOLTAGE ERROR (%)
–0.25
–0.50
–0.75
–1.00
0.5 1.0 1.5
VREF = 0.5V
VREF = 1.0V
0
6571-053
Figure 53. VREF Accuracy vs. Load
Table 14. Reference Configuration Summary
Selected Mode SENSE Voltage Resulting VREF (V) Resulting Differential Span (V p-p)
External Reference AVDD N/A 2 × external reference
Internal Fixed Reference VREF 0.5 1.0
Programmable Reference 0.2 V to VREF
R1
R2
10.5
(see Figure 52)
2 × VREF
Internal Fixed Reference AGND to 0.2 V 1.0 2.0