Datasheet
AD9627
Rev. B | Page 44 of 76
MEMORY MAP REGISTER TABLE
All address and bit locations that are not included in Table 25 are not currently supported for this device.
Table 25. Memory Map Registers
Addr
(Hex)
Register
Name
Bit 7
(MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
Bit 0
(LSB)
Default
Value
(Hex)
Default
Notes/
Comments
Chip Configuration Registers
0x00
SPI Port
Configuration
(Global)
0 LSB first Soft reset 1 1 Soft reset LSB first 0 0x18
The nibbles
are mirrored
so LSB-first
mode or MSB-
first mode
registers
correctly,
regardless of
shift mode
0x01 Chip ID
(Global)
8-bit Chip ID[7:0]
(AD9627 = 0x12)
(default)
0x12 Read only
0x02 Chip Grade
(Global)
Open Open Speed grade ID
00 = 150 MSPS
01 = 125 MSPS
10 = 105 MSPS
11 = 80 MSPS
Open Open Open Open
Speed grade
ID used to
differentiate
devices; read
only
Channel Index and Transfer Registers
0x05 Channel Index Open Open Open Open Open Open
Data
Channel B
(default)
Data
Channel A
(default)
0x03
Bits are set
to determine
which device
on the chip
receives the
next write
command;
applies to local
registers only
0xFF Transfer Open Open Open Open Open Open Open Transfer 0x00
Synchronously
transfers data
from the
master shift
register to the
slave
ADC Functions
0x08 Power Modes Open Open
External
power-
down pin
function
(global)
0 = pdwn
1 = stndby
Open Open Open
Internal power-down
mode (local)
00 = normal operation
01 = full power-down
10 = standby
11 = normal operation
0x00
Determines
various generic
modes of chip
operation
0x09 Global Clock
(Global)
Open Open Open Open Open Open Open
Duty cycle
stabilizer
(default)
0x01
0x0B Clock Divide
(Global)
Open Open Open Open Open Clock divide ratio
000 = divide by 1
001 = divide by 2
010 = divide by 3
011 = divide by 4
100 = divide by 5
101 = divide by 6
110 = divide by 7
111 = divide by 8
0x00
Clock divide
values other
than 000
automatically
cause the duty
cycle stabilizer
to become
active
0x0D
Test Mode
(Local)
Open Open
Reset PN23
gen
Reset
PN9 gen
Open Output test mode
000 = off (default)
001 = midscale short
010 = positive FS
011 = negative FS
100 = alternating checkerboard
101 = PN 23 sequence
110 = PN 9 sequence
111 = one/zero word toggle
0x00
When this
register is set,
the test data
is placed on
the output
pins in place of
normal data