Datasheet

AD9627
Rev. B | Page 59 of 76
0
6571-080
J7 - INSTALLFORPDWN J8 - INSTALLFOR OUTPUTDISABLE
J5 - INSTALL FOR IV VREF/2V INPUT SPAN J4 - INSTALL FOR 0.5V VREF/IVINPUT SPAN J6 - INSTALLFOR EXTERNALREFERENCEMODE
AD9627
36 45
49
50
41
58
25
6
26
7
27
8
28
9 13
59
14
60
15
61
16
62
17
63
18
2
19
3
22
4
23
5 11 10 12
64
20
1
21
24
57
29
53
30
54
31
55
32
56
46 34 35 33 42 40
51
48 47
52
37 44 38 43 39
U1
D3A D6B
5 6 7 8
4 3 2 1
22 oh m
RPAK 4
R58
9
10 11 12 13 14 15 16
8 7 6 5 4 3 2 1
22 oh m
RPAK 8
R60
AVDD
R112
RES040 2
0 OH M
R115
RES040 2
0OHM
R113
RES040 2
0OHM
1
TP6
R63
RES040 2
10K OHM
C15 1U
9
10 11 12 13 14 15 16
8 7 6 5 4 3 2 1
22 oh m
RPAK 8
R59
FD0B
9
10 11 12 13 14 15 16
8 7 6 5 4 3 2 1
22 oh m
RPAK 8
R57
FD1B FD2B FD3B SPARE1 SPARE2
D0B D1B D2B D3B
D11B D10B D9B D8B D7B D5B D4B DCO B DCO A SPARE 3 SPARE 4 D0A D1A D2A
D4A D5A D6A D7A D8A D9A D10A D11A
DVD D
AVDD
PWR_SDFS
FD0A
PWR_SD O
PWR_SCL K
FD3A
FD2A
FD1A
DRVDD
1 1 1 1
C109 0.1U
C121 0.1U
C122 0.001U
C126 0.001U
C127 0.001U
C34
0.1U
C33
0.001U
C35
0.001U
C36
0.1U
C32
0.1U
C14 0.1U
C40 0.1U
C120 0.1U
9
10 11 12 13 14 15 16
8 7 6 5 4 3 2 1
22 oh m
RPAK 8
R61
1
TP3
1
TP5
9
10
11
12
13
14
15
16
8
7
6
5
4
3
2
1
22 oh m
RPAK 8
R62
DVDD
DVDD
SYN C
SPI_CSB
CLK-
CLK+
AVDD
VIN+ A
VIN- A VIN- B VIN+ B
AVDD AVDD
SPI_SDI O SPI_SCL K
DRVD D
CML
DRVD D
C137 0.001U
R64
RES040 2
0OHM
AVDD1 AVDD2
CLK+
CLK-
CML
D8A
D8B
D9A
D9B
D10A
D10B
D11A_MSB_
D11B_MSB
D0A_LSB
D0B_LSB
D1A
D1B
D2A
D2B
D3A
D3B
D4A
D4B D5B
D6A
D6B
D7A
D7B
DCOA DCOB
NC
DRGND
DRGND1
DRVDD
DRVDD1
DVDD1
DVDD2
FD0A
FD0B
FD1A
FD1B
FD2A
FD2B
FD3A
FD3B
AVDD3 SMI_SCLK/PDWN SMI_SDFS SMI_SDO/OEB RBIAS SENSE
SPI_CSB
SPI_SCLK/DFS SPI_SDIO/DCS
SYNC
VIN+A VIN+B VIN-A VIN-B VREF
NC
NC
NC
D5A
Figure 80. Evaluation Board Schematic, DUT