Datasheet

AD9640
Rev. B | Page 15 of 52
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED THERMAL PAD ON THE BOTTOM OF THE PACKAGE PROVIDES THE
ANALOG GROUND FOR THE PART. THIS EXPOSED PAD MUST BE CONNECTED TO
GROUND FOR PROPER OPERATION.
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
D5A D6A D7A
DRGND
DRVDD
D8A D9A
DVDD
D10A
D11A
D12A
D13A (MSB)
FD0A FD1A FD2A FD3A
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
DRGND D5B D4B D3B D2B D1B D0B (LSB) DVDD FD3B FD2B FD1B FD0B SYNC CSB CLK– CLK+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
DRVDD
D6B
D7B
D8B
D9B
D10B
D11B
D12B
D13B (MSB)
DCOB
DCOA
D0A (LSB)
D1A
D2A
D3A
D4A
SCLK/DFS
SDIO/DCS
AVDD
AVDD
VIN+B
VIN–B
RBIAS
CML
SENSE
VREF
VIN–A
VIN+A
AVDD
SMI SDFS
SMI SCLK/PDWN
SMI SDO/OEB
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
06547-002
PIN 1
INDICATOR
AD9640
PARALLEL CMOS
TOP VIEW
(Not to Scale)
EXPOSED PADDLE, PIN 0
(BOTTOM OF PACKAGE)
Figure 6. Pin Configuration, LFCSP Parallel CMOS (Top View)
Table 11. Pin Function Descriptions (Parallel CMOS Mode)
Pin No. Mnemonic Type Description
ADC Power Supplies
20, 64 DRGND Ground Digital Output Ground.
1, 21 DRVDD Supply Digital Output Driver Supply (1.8 V to 3.3 V).
24, 57 DVDD Supply Digital Power Supply (1.8 V Nominal).
36, 45, 46 AVDD Supply Analog Power Supply (1.8 V Nominal).
0
AGND,
Exposed Pad
Ground
The exposed thermal pad on the bottom of the package provides the analog ground
for the part. This exposed pad must be connected to ground for proper operation.
ADC Analog
37 VIN+A Input Differential Analog Input Pin (+) for Channel A.
38 VIN−A Input Differential Analog Input Pin (−) for Channel A.
44 VIN+B Input Differential Analog Input Pin (+) for Channel B.
43 VIN−B Input Differential Analog Input Pin (−) for Channel B.
39 VREF Input/Output Voltage Reference Input/Output.
40 SENSE Input Voltage Reference Mode Select. See Table 14 for details.
42 RBIAS Input/Output External Reference Bias Resistor.
41 CML Output Common Mode Level Bias Output for Analog Inputs.
49 CLK+ Input ADC Clock Input—True.
50 CLK− Input ADC Clock Input—Complement.