Datasheet

AD9640
Rev. B | Page 38 of 52
BUILT-IN SELF-TEST (BIST) AND OUTPUT TEST
The AD9640 includes built-in test features to enable verification
of the integrity of each channel as well as to facilitate board level
debugging. A built-in self-test (BIST) feature is included that
verifies the integrity of the digital data path of the AD9640.
Various output test options are also provided to place predictable
values on the outputs of the AD9640.
BUILT-IN SELF-TEST (BIST)
The BIST is a thorough test of the digital portion of the selected
AD9640 signal path. When enabled, the test runs from an internal
PN source through the digital data path starting at the ADC
block output. The BIST sequence runs for 512 cycles and stops.
The BIST signature value for Channel A or Channel B is placed
in Register 0x024 and Register 0x025. If one channel is chosen,
its BIST signature is written to the two registers. If both channels
are chosen, the results from the A channel are placed in the
BIST signature register.
The outputs are not disconnected during this test, so the PN
sequence can be observed as it runs. The PN sequence can be
continued from its last value or started from the beginning,
based on the value programmed in Register 0x00E, Bit 2. The
BIST signature result varies based on the channel configuration.
OUTPUT TEST MODES
The output test options are shown in Table 25. When an output
test mode is enabled, the analog section of the ADC is discon-
nected from the digital backend blocks and the test pattern is run
through the output formatting block. Some of the test patterns are
subject to output formatting and some are not. The seed value for
the PN sequence tests can be forced if the PN reset bits are used
to hold the generator in reset mode by setting Bit 4 or Bit 5 of
Register 0x0D. These tests can be performed with or without
an analog signal (if present, the analog signal is ignored), but
they do require an encode clock. For more information, see the
AN-877 Application Note, Interfacing to High Speed ADCs via SPI.