Datasheet

AD9763/AD9765/AD9767 Data Sheet
Rev. G | Page 34 of 44
EVALUATION BOARD
GENERAL DESCRIPTION
The AD9763/AD9765/AD9767-EBZ is an evaluation board
for the AD9763/AD9765/AD9767 10-/12-/14-bit dual DAC.
Careful attention to layout and circuit design, combined with a
prototyping area, allow the user to easily and effectively evaluate
the AD9763/AD9765/AD9767 in any application where a high
resolution, high speed conversion is required.
This board allows the user the flexibility to operate the AD9763/
AD9765/AD9767 in various configurations. Possible output
configurations include transformer coupled, resistor terminated,
and single-ended and differential outputs. The digital inputs can be
used in dual-port or interleaved mode and are designed to be
driven from various word generators, with the on-board option
to add a resistor network for proper load termination. When
operating the AD9763/AD9765/AD9767, best performance is
obtained by running the digital supply (DVDD1/DVDD2) at
3.3 V and the analog supply (AVDD) at 5 V.
SCHEMATICS
00617-086
L1
BEADBEAD
VAL
VOLT
DCASE
VAL
VOLT
DCASE
DGND
C10C9
DVDD AVDD
2
TB1
1
TB1
BLK
BLKBLKBLK
RED
RED
BLKBLKBLK
BLK
AVDDIN
AGND
L2
DVDDIN 3
TB1
4
TB1
R5
R2
R1
RCO M
R3
R4
R6
R7
R8
R9
R2
R1
RCO M
R3
R4
R5
R6
R7
R8
R9
R2
R1
RCO M
R3
R4
R5
R6
R7
R8
R9
R2
R1
RCO M
R3
R4
R5
R6
R7
R8
R9
22
22 22
22
1
10
9
8
7
6
5
4
3
2
1
10
9
8
7
6
5
4
3
22
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
1
RP16
RP10RP15
RP9
INP1
INP31
INP32
INP33
INP34
INCK2
INP36
INP35
INP4
INP3
INP2
INP8
INP7
INP6
INP5
INP26
INP25
INP24
INP23
INP30
INP29
INP28
INP27
INP12
INP11
INP10
INP9
INCK1
INP14
INP13
Figure 86. Power Decoupling and Clocks on AD9763/AD9765/AD9767 Evaluation Board (1)