Datasheet

AD9763/AD9765/AD9767 Data Sheet
Rev. G | Page 10 of 44
Table 6. Pin Function Descriptions
Pin No.
AD9763 AD9765 AD9767 Mnemonic Description
1 to 10 1 to 12 1 to 14 DBxP1 Data Bit Pins (Port 1)
11 to 14,
33 to 36
13, 14,
35, 36
N/A NC No Connect
15, 21 15, 21 15, 21 DCOM1, DCOM2 Digital Common
16, 22 16, 22 16, 22 DVDD1, DVDD2 Digital Supply Voltage
17 17 17 WRT1/IQWRT Input Write Signal for PORT 1 (IQWRT in Interleaving Mode)
18 18 18 CLK1/IQCLK Clock Input for DAC1 (IQCLK in Interleaving Mode)
19 19 19 CLK2/IQRESET Clock Input for DAC2 (IQRESET in Interleaving Mode)
20 20 20 WRT2/IQSEL Input Write Signal for PORT 2 (IQSEL in Interleaving Mode)
23 to 32 23 to 34 23 to 36 DBxP2 Data Bit Pins (Port 2)
37 37 37 SLEEP Power-Down Control Input
38 38 38 ACOM Analog Common
39, 40 39, 40 39, 40 I
OUTA2
, I
OUTB2
Port 2 Differential DAC Current Outputs
41 41 41 FSADJ2 Full-Scale Current Output Adjust for DAC2
42 42 42 GAINCTRL Master/Slave Resistor Control Mode
43 43 43 REFIO Reference Input/Output
44 44 44 FSADJ1 Full-Scale Current Output Adjust for DAC1
45, 46 45, 46 45, 46 I
OUTB1
, I
OUTA1
Port 1 Differential DAC Current Outputs
47 47 47 AVDD Analog Supply Voltage
48 48 48 MODE Mode Select (1 = dual port, 0 = interleaved)