Datasheet
AD9911
Rev. 0 | Page 33 of 44
INSTRUCTION CYCLE DATA TRANSFER CYCLE
SCLK
SDIO_1
SDIO_0
SDIO_2
SDIO_3
CS
I7
(I3)
I1
(I5)
I5
(I1)
I3
(I7)
I6
(I2)
I0
(I4)
I4
(I0)
I2
(I6)
D7
(D3)
D1
(D5)
D5
(D1)
D3
(D7)
D6
(D2)
D0
(D4)
D4
(D0)
D2
(D6)
05785-049
Figure 52. 4-Bit Mode Write Timing—Clock Stall Low
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
I7
(I0)
SDIO_0
SCLK
CS
I6
(I1)
I5
(I2)
I4
(I3)
I3
(I4)
I2
(I5)
I1
(I6)
I0
(I7)
D7
(D0)
D6
(D1)
D5
(D2)
D4
(D3)
D3
(D4)
D2
(D5)
D1
(D6)
D0
(D7)
05785-050
Figure 53. Single-Bit Serial Mode (2-Wire) Read Timing—Clock Stall High
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
SDIO_0
SCLK
CS
DON'T CARE
SDO
(SDIO_2 PIN)
I7
(I0)
I6
(I1)
I5
(I2)
I4
(I3)
I3
(I4)
I2
(I5)
I1
(I6)
I0
(I7)
D7
(D0)
D6
(D1)
D5
(D2)
D4
(D3)
D3
(D4)
D2
(D5)
D1
(D6)
D0
(D7)
05785-051
Figure 54. Single-Bit Serial Mode (3-Wire) Read Timing—Clock Stall Low