Datasheet

AD9911
Rev. 0 | Page 8 of 44
Parameter Min Typ Max Unit Test Conditions/Comments
DATA LATENCY (PIPELINE DELAY) SINGLE-
TONE MODE
2, 3
Frequency, Phase, and Amplitude Words to
DAC Output with Matched Latency Enabled
29 SYSCLK
cycles
Frequency Word to DAC Output with
Matched Latency Disabled
29 SYSCLK
cycles
Phase Offset Word to DAC Output with
Matched Latency Disabled
25 SYSCLK
cycles
Amplitude Word to DAC Output with
Matched Latency Disabled
17 SYSCLK
cycles
DATA LATENCY (PIPELINE DELAY)
MODULATION MODE
4
Frequency Word to DAC Output 34 SYSCLK
Cycles
Phase Offset Word to DAC Output 29 SYSCLK
Cycles
Amplitude Word to DAC Output 21 SYSCLK
Cycles
DATA LATENCY (PIPELINE DELAY) LINEAR
SWEEP MODE
4
Frequency Rising/Falling Delta Tuning Word
to DAC Output
41 SYSCLK
Cycles
Phase Offset Rising/Falling Delta Tuning
Word to DAC Output
37 SYSCLK
Cycles
Amplitude Rising/Falling Delta Tuning Word
to DAC Output
29 SYSCLK
Cycles
1
For the VCO frequency range of 160 MHz to 255 MHz, the appropriate setting for the VCO gain bit is dependent upon supply, temperature and process. Therefore, in a
production environment this frequency band must be avoided.
2
Data latency is reference to the I/O_UPDATE pin.
3
Data latency is fixed and the units are system clock (SYSCLK) cycles
4
Data latency is referenced to a profile change.