Inc. Recording Equipment User Manual
Table Of Contents
- Features
- Applications
- General Description
- Basic Block Diagram
- Revision History
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Input/Output Termination Recommendations
- Theory of Operation
- Thermal Performance
- Power-Up
- Power Supply Partitioning
- Serial Control Port
- I/O Register Map
- I/O Register Descriptions
- Serial Port Configuration (Register 0x0000 to Register 0x0005)
- Power-Down and Reset (Register 0x0010 to Register 0x0013)
- System Clock (Register 0x0020 to Register 0x0022)
- CMOS Output Divider (S-Divider) (Register 0x0100 to Register 0x0106)
- Frequency Tuning Word (Register 0x01A0 to Register 0x01AD)
- Register 0x01A0 to Register 0x01A5—Reserved
- Register 0x01A6—FTW0 (Frequency Tuning Word)
- Register 0x01A7—FTW0 (Frequency Tuning Word) (Continued)
- Register 0x01A8—FTW0 (Frequency Tuning Word) (Continued)
- Register 0x01A9—FTW0 (Frequency Tuning Word) (Continued)
- Register 0x01AA—FTW0 (Frequency Tuning Word) (Continued)
- Register 0x01AB—FTW0 (Frequency Tuning Word) (Continued)
- Register 0x01AC—Phase
- Register 0x01AD—Phase (Continued)
- Doubler and Output Drivers (Register 0x0200 to Register 0x0201)
- Calibration (User-Accessible Trim) (Register 0x0400 to Register 0x0410)
- Harmonic Spur Reduction (Register 0x0500 to Register 0x0509)
- Outline Dimensions
AD9912
Rev. D | Page 13 of 40
06763-051
100 1k 10k 100k 1M 10M 100M
FREQUENCY OFFSET (Hz)
–125
–115
–135
–145
–155
–165
–175
PHASE NOISE (dBc/Hz)
RMS JITTER (100Hz TO 20MHz):
50MHz:
200MHz:
400MHz:
62fs
37fs
31fs
200MHz
400MHz
50MHz
Figure 21. Absolute Phase Noise of Unfiltered DAC Output,
f
OUT
= 50 MHz, 200 MHz, and 400 MHz, SYSCLK Driven by
a 1 GHz Wenzel Oscillator (SYSCLK PLL Bypassed)
06763-052
100 1k 10k 100k 1M 10M 100M
FREQUENCY OFFSET (Hz)
–125
–115
–135
–145
–155
–165
–175
PHASE NOISE (dBc/Hz)
RMS JITTER (100Hz TO 20MHz): 69fs
Figure 22. Absolute Phase Noise of Unfiltered DAC Output, f
OUT
= 63 MHz,
SYSCLK Driven by a 1 GHz Wenzel Oscillator (SYSCLK PLL Bypassed)
06763-053
100 1k 10k 100k 1M 10M 100M
FREQUENCY OFFSET (Hz)
–125
–115
–135
–145
–155
–165
–175
PHASE NOISE (dBc/Hz)
RMS JITTER (100Hz TO 40MHz): 61fs
Figure 23. Absolute Phase Noise of Unfiltered DAC Output, f
OUT
= 171 MHz,
SYSCLK Driven by a 1 GHz Wenzel Oscillator (SYSCLK PLL Bypassed)
06763-054
100 1k 10k 100k 1M 10M 100M
FREQUENCY OFFSET (Hz)
–125
–115
–135
–145
–155
–165
–175
PHASE NOISE (dBc/Hz)
RMS JITTER (100Hz TO 100MHz): 83fs
Figure 24. Absolute Phase Noise of Unfiltered DAC Output, f
OUT
= 258.3 MHz,
SYSCLK Driven by a 1 GHz Wenzel Oscillator (SYSCLK PLL Bypassed)
06763-055
100 1k 10k 100k 1M 10M 100M
FREQUENCY OFFSET (Hz)
–125
–115
–135
–145
–155
–165
–175
PHASE NOISE (dBc/Hz)
RMS JITTER (100Hz TO 100MHz): 82fs
Figure 25. Absolute Phase Noise of Unfiltered DAC Output, f
OUT
= 311.6 MHz,
SYSCLK Driven by a 1 GHz Wenzel Oscillator (SYSCLK PLL Bypassed)
06763-056
100 1k 10k 100k 1M 10M 100M
FREQUENCY OFFSET (Hz)
–120
–110
–130
–140
–150
–160
–170
PHASE NOISE (dBc/Hz)
RMS JITTER (100Hz TO 100MHz): 22fs
Figure 26. Absolute Phase Noise of 1 GHz Reference Used for Performance
Plots; Wenzel Components Used: 100 MHz Oscillator, LNBA-13-24 Amp,
LNOM 100-5 Multiplier, LNDD 500-14 Diode Doubler