Datasheet

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Ultralow Power, Low Distortion

Fully Differential ADC Driver

Data Sheet

ADA4940-1/ADA4940-2

Rev. C Document Feedback

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FEATURES

Small signal bandwidth: 260 MHz

Ultralow power 1.25mA

Extremely low harmonic distortion

−122 dB THD at 50 kHz

−96 dB THD at 1 MHz

Low input voltage noise: 3.9 nV/√Hz

0.35 mV maximum offset voltage

Balanced outputs

Settling time to 0.1%: 34 ns

Rail-to-rail output: −V

+ 0.1 V to +V

− 0.1 V

Adjustable output common-mode voltage

Flexible power supplies: 3 V to 7 V (LFCSP)

Disable pin to reduce power consumption

ADA4940-1 is available in LFCSP and SOIC packages

APPLICATIONS

Low power PulSAR®/SAR ADC drivers

Single-ended-to-differential conversion

Differential buffers

Line drivers

Medical imaging

Industrial process controls

Portable electronics

GENERAL DESCRIPTION

The ADA4940-1/ADA4940-2 are low noise, low distortion fully

differential amplifiers with very low power consumption. They

are an ideal choice for driving low power, high resolution, high

performance SAR and sigma-delta (Σ-Δ) analog-to-digital

converters (ADCs) with resolutions up to 16 bits from dc to

1 MHz on only 1.25 mA of quiescent current. The adjustable

level of the output common-mode voltage allows the ADA4940-1/

ADA4940-2 to match the input common-mode voltage of

multiple ADCs. The internal common-mode feedback loop

provides exceptional output balance, as well as suppression of

even-order harmonic distortion products.

With the ADA4940-1/ADA4940-2, differential gain

configurations are easily realized with a simple external feedback

network of four resistors determining the closed-loop gain of

the amplifier. The ADA4940-1/ADA4940-2 are fabricated using

Analog Devices, Inc., SiGe complementary bipolar process,

enabling them to achieve very low levels of distortion with an

input voltage noise of only 3.9 nV/√Hz. The low dc offset and

excellent dynamic performance of the ADA4940-1/ADA4940-2

make them well suited for a variety of data acquisition and signal

processing applications.

FUNCTIONAL BLOCK DIAGRAMS

1–FB

2+IN

3–IN

4+FB

11 –OUT

12 DISABLE

10 +OUT

9 V

OCM

5+V

6+V

7+V

–V

ADA4940-1

08452-001

ADA4940-2

1–IN1

2+FB1

3+V

4+V

5–FB2

6+IN2

–V

16 –V

17 V

OCM1

18 +OUT1

DISABLE2

13 –OUT2

7–IN2

8+FB2

9+V

11V

OCM2

12+OUT2

10+V

–V

–FB1

+IN1

DISABLE1

–OUT1

Figure 1.

–160

–140

–120

–100

–80

–60

–40

–20

0 20k 40k

60k 80k 100k

08452-300

AMPLITUDE (dB)

FREQUENCY (Hz)

–D

+IN

–OUT

33Ω

2.5V

AD7982

ADA4940-1

33Ω

2.7nF

+OUT

–

–IN

IN+

IN–

GND

VDD

REF

OCM

Figure 2. ADA4940-1 Driving the AD7982 ADC

The ADA4940-1 is available in a Pb-free, 3 mm × 3 mm, 16-lead

LFCSP, and an 8-lead SOIC. The ADA4940-2 is available in a Pb-

free, 4 mm × 4 mm, 24-lead LFCSP. The pinout is optimized to

facilitate printed circuit board (PCB) layout and minimize

distortion. The ADA4940-1/ADA4940-2 are specified to

operate over the −40°C to +125°C temperature range.

Table 1. Similar Products to the ADA4940-1/ADA4940-2

Product

Isupply

(mA)

Bandwidth

(MHz)

Slew Rate

(V/µs)

Noise

(nV/√Hz)

AD8137 3 110 450 8.25

ADA4932-x 9 560 2800 3.6

ADA4941-1 2.2 31 22 5.1

Table 2. Complementary Products to the ADA4940-1/ADA4940-2

Product

Power

(mW)

Throughput

(MSPS)

Resolution

(Bits)

SNR

(dB)

AD7982 7.0 1 18 98

AD7984 10.5 1.333 18 96.5

AD7621

AD7623

1.333

Summary of content (33 pages)

PAGE 1
Ultralow Power, Low Distortion Fully Differential ADC Driver ADA4940-1/ADA4940-2 Data Sheet +IN1 –FB1 –VS1 –VS1 DISABLE1 –OUT1 24 23 22 21 20 19 –IN1 12 DISABLE +FB1 11 –OUT +VS1 +VS1 10 +OUT –FB2 9 VOCM +IN2 +IN 2 –IN 3 +OUT1 VOCM1 –VS2 –VS2 DISABLE2 –OUT2 –IN2 7 +FB2 8 +VS2 9 +VS2 10 VOCM2 11 +OUT2 12 18 17 16 15 14 13 Figure 1. 0 CF +DIN –20 +IN + 33Ω –OUT VOCM AMPLITUDE (dB) 2.
PAGE 2
Powered by TCPDF (www.tcpdf.org) IMPORTANT LINKS for the ADA4940-1_4940-2* Last content update 10/01/2013 09:44 am PARAMETRIC SELECTION TABLES DESIGN COLLABORATION COMMUNITY Find Similar Products By Operating Parameters SAR ADC & Driver Quick-Match Guide Collaborate Online with the ADI support team and other designers about select ADI products.
PAGE 3
ADA4940-1/ADA4940-2 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Applications Information .............................................................. 23 Applications ....................................................................................... 1 Analyzing an Application Circuit ............................................ 23 General Description ........................................................
PAGE 4
Data Sheet ADA4940-1/ADA4940-2 REVISION HISTORY 9/13—Rev. B to Rev. C Updated Outline Dimensions ........................................................30 Changes to Ordering Guide ...........................................................31 3/12—Rev. A to Rev. B Reorganized Layout ........................................................... Universal Added ADA4940-1 8-Lead SOIC Package ..................... Universal Changes to Features Section, Table 1, and Figure 1; Replaced Figure 2 .................
PAGE 5
ADA4940-1/ADA4940-2 Data Sheet SPECIFICATIONS VS = 5 V VOCM = Mid Supply, RF = RG = 1 kΩ, RL, dm = 1 kΩ, TA = 25°C, LFCSP package, unless otherwise noted. TMIN to TMAX = −40°C to +125°C. (See Figure 61 for the definition of terms.) +DIN or –DIN to VOUT, dm Performance Table 3. Parameter DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.
PAGE 6
Data Sheet ADA4940-1/ADA4940-2 VOCM to VOUT, cm Performance Table 4. Parameter VOCM DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Slew Rate Input Voltage Noise Gain VOCM CHARACTERISTICS Input Common-Mode Voltage Range Input Resistance Offset Voltage Input Offset Voltage Drift Input Bias Current CMRR Test Conditions/Comments VOUT, cm = 0.1 V p-p VOUT, cm = 1 V p-p VOUT, cm = 1 V p-p f = 100 kHz ΔVOUT, cm/ΔVOCM, ΔVOCM = ±1 V Min Typ 0.
PAGE 7
ADA4940-1/ADA4940-2 Data Sheet VS = 3 V VOCM = Mid Supply, RF = RG = 1 kΩ, RL, dm = 1 kΩ, TA = 25°C, LFCSP package, unless otherwise noted. TMIN to TMAX = −40°C to +125°C. (See Figure 61 for the definition of terms.) +DIN or –DIN to VOUT, dm Performance Table 6. Parameter DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.
PAGE 8
Data Sheet ADA4940-1/ADA4940-2 VOCM to VOUT, cm Performance Table 7. Parameter VOCM DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Slew Rate Input Voltage Noise Gain VOCM CHARACTERISTICS Input Common-Mode Voltage Range Input Resistance Offset Voltage Input Offset Voltage Drift Input Bias Current CMRR Test Conditions/Comments VOUT, cm = 0.1 V p-p VOUT, cm = 1 V p-p VOUT, cm = 1 V p-p f = 100 kHz ΔVOUT, cm/ΔVOCM, ΔVOCM = ±0.25 V Min Typ 0.
PAGE 9
ADA4940-1/ADA4940-2 Data Sheet ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage VOCM Differential Input Voltage Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 sec) Junction Temperature ESD Field Induced Charged Device Model (FICDM) Human Body Model (HBM) Rating 8V ±VS 1.2 V −40°C to +125°C −65°C to +150°C 300°C 150°C 1250 V 2000 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device.
PAGE 10
Data Sheet ADA4940-1/ADA4940-2 14 –VS ADA4940-1 12 DISABLE –IN 1 8 +IN VOCM 2 7 DISABLE 6 –VS 5 –OUT +FB 4 9 VOCM ADA4940-1 NOTES 1. CONNECT THE EXPOSED PAD TO –VS OR GROUND. 08452-101 +VS 8 +OUT 4 +VS 7 10 +OUT +VS 6 11 –OUT –IN 3 +VS 5 +IN 2 +VS 3 08452-003 –FB 1 13 –VS 16 –VS 15 –VS PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 4. ADA4940-1 Pin Configuration (16-Lead LFCSP) Figure 5.ADA4940-1 Pin Configuration (SOIC) Table 11.
PAGE 11
Data Sheet 24 23 22 21 20 19 +IN1 –FB1 –VS1 –VS1 DISABLE1 –OUT1 ADA4940-1/ADA4940-2 1 2 3 4 5 6 ADA4940-2 18 17 16 15 14 13 +OUT1 VOCM1 –VS2 –VS2 DISABLE2 –OUT2 NOTES 1. CONNECT THE EXPOSED PAD TO –VS OR GROUND. 08452-102 –IN2 +FB2 +VS2 +VS2 VOCM2 +OUT2 7 8 9 10 11 12 –IN1 +FB1 +VS1 +VS1 –FB2 +IN2 Figure 6. ADA4940-2 Pin Configuration (24-Lead LFCSP) Table 13. ADA4940-2 Pin Function Descriptions (24-Lead LFCSP) Pin No.
PAGE 12
Data Sheet ADA4940-1/ADA4940-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VS = ±2.5 V, G = 1, RF = RG = 1 kΩ, RT = 52.3 Ω (when used), RL = 1 kΩ, unless otherwise noted. See Figure 59 and Figure 60 for the test circuits. 3 3 G = 1, RL = 1kΩ 2 2 1 –1 G = 1, RL = 200Ω –2 –3 G = 2, RL = 1kΩ –4 –5 G = 2, RL = 200Ω –6 –8 –3 –4 G = 2, RL = 200Ω –5 –6 G = 1, RL = 200Ω G = 1, RL = 1kΩ –8 VOUT, dm = 0.1V p-p 1 10 100 1000 FREQUENCY (MHz) Figure 7.
PAGE 13
ADA4940-1/ADA4940-2 Data Sheet 4 3 3 SOIC-1 LFCSP-1 2 1 1 0 –1 LFCSP-2: CH2 –1 –2 GAIN (dB) LFCSP-2:CH1 –3 –4 –7 –8 VOUT, dm = 0.1V p-p 10 100 1000 FREQUENCY (MHz) 08452-012 1 –9 100 1000 Figure 16. Large Signal Frequency Response for Various Packages 3 3 2 VOCM = –1V VOCM = 0V VOCM = +1V 2 VOCM = 0V 1 1 0 0 VOCM = –1V –2 –1 GAIN (dB) –1 VOCM = +1V –3 –4 –2 –3 –4 –5 –5 –6 –6 –7 –8 VOUT, dm = 0.
PAGE 14
Data Sheet ADA4940-1/ADA4940-2 4 4 CCOM1 = CCOM2 = 2pF 3 2 2 1 1 0 CCOM1 = CCOM2 = 1pF –2 CCOM1 = CCOM2 = 0.5pF –3 CCOM1 = CCOM2 = 0pF GAIN (dB) –1 –4 –2 –3 –4 –5 –6 –6 –7 –7 10 100 1000 FREQUENCY (MHz) Figure 19. Small Signal Frequency Response for Various Capacitive Loads (LFCSP) 1 0.15 0.15 NORMALIZED GAIN (dB) 0.25 0.20 0 –0.05 G = 2, RL = 200Ω –0.10 G = 2, RL = 1kΩ –0.20 0 –0.05 G = 2, RL = 200Ω –0.10 G = 1, RL = 1kΩ –0.20 1 G = 1, RL = 1kΩ 0.05 –0.
PAGE 15
ADA4940-1/ADA4940-2 Data Sheet –20 –20 VOUT, dm = 2V p-p –30 –40 HARMONIC DISTORTION (dBc) –50 –60 HD3, G = 2 –70 HD3, G = 1 –80 HD2, G = 2 –90 HD2, G = 1 –100 –110 –120 –70 –80 HD2, G = 2 –90 HD2, G = 1 –100 –110 –20 –30 HARMONIC DISTORTION (dBc) –40 –50 –60 HD3, RL = 200Ω –70 HD3, RL = 1kΩ –80 –90 –100 HD2, RL = 1kΩ HD2, RL = 200Ω –110 1 0.1 10 Figure 28. Harmonic Distortion vs. Frequency vs.
PAGE 16
Data Sheet ADA4940-1/ADA4940-2 HARMONIC DISTORTION (dBc) –50 –60 –70 SOIC: RL = 200Ω –90 SOIC: RL = 1kΩ –100 –110 LFCSP: RL = 1kΩ –120 1 VS = +3V, 0V HD3 –70 VS = +3V, 0V HD2 –80 10 Figure 31. Spurious-Free Dynamic Range vs. Frequency at RL = 200 Ω and RL = 1kΩ –100 VS = ±3.5V HD3 –110 VS = ±2.
PAGE 17
ADA4940-1/ADA4940-2 Data Sheet 10 –60 VOUT, dm = 2V p-p (ENVELOPE) 0 VOUT, dm = 2V p-p –70 –20 –80 –30 CROSSTALK (dB) NORMALIZED SPECTRUM (dBc) –10 –40 –50 –60 –70 –80 CHANNEL 1 TO CHANNEL 2 –90 –100 –110 –90 CHANNEL 2 TO CHANNEL 1 –100 –120 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 FREQUENCY (MHz) 2.5 –130 0.1 08452-033 Figure 40. Crosstalk vs.
PAGE 18
Data Sheet ADA4940-1/ADA4940-2 2.0 8 0.5 G = +2 0.4 1.6 6 VOUT, dm 1.2 0.3 INPUT VOLTAGE (V) 0.8 2 2 × VIN 0 –2 0.2 OUTPUT 0.4 0.1 %ERROR 0 ERROR (%) OUTPUT VOLTAGE (V) 4 0 –0.4 –0.1 –0.8 –0.2 –4 100 200 300 400 500 600 700 800 900 1000 TIME (ns) VOUT, dm = 2V p-p 10 0 20 60 –0.5 80 70 100 10 1k 10k 100k 1M 10M FREQUENCY (Hz) 1 0.1 0.01 0.1 0 2.50 1.25 –0.25 2.25 –0.50 2.00 +2.5V R2 –2.5V –FB DISABLE –OUT +IN DISABLE 0.25 –1.
PAGE 19
ADA4940-1/ADA4940-2 Data Sheet 1.5 100 G = 1, RL = 200Ω G = 2, RL = 200Ω 40 1.0 OUTPUT VOLTAGE (V) G = 2, RL = 1kΩ 20 G = 1, RL = 1kΩ 0 –20 –40 –60 –0.5 G G G G RL = RL = RL = RL = 1kΩ 200Ω 1kΩ 200Ω 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 TIME (ns) –1.5 08452-042 0 = 1, = 1, = 2, = 2, VOUT, dm = 2V p-p VOUT, dm = 0.1V p-p –100 Figure 49.
PAGE 20
Data Sheet ADA4940-1/ADA4940-2 100 80 LFCSP-1 LFCSP-2: CH1 LFCSP-2: CH2 SOIC-1 80 60 OUTPUT VOLTAGE (mV) 60 40 20 0 –20 –40 –60 40 20 0 –20 –40 –60 –80 –80 VOUT, dm = 0.1V p-p VOUT, dm = 0.1V p-p 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 TIME (ns) –100 08452-204 –100 Figure 55.
PAGE 21
ADA4940-1/ADA4940-2 Data Sheet TEST CIRCUITS 1kΩ NETWORK ANALYZER OUTPUT 475Ω 1kΩ 50Ω 52.3Ω VIN NETWORK ANALYZER INPUT +2.5V ADA4940-1/ ADA4940-2 VOCM 1kΩ 50Ω 54.9Ω 54.9Ω 50Ω 475Ω 08452-067 25.5Ω –2.5V 1kΩ Figure 59. Equivalent Basic Test Circuit 1kΩ DC-COUPLED GENERATOR VIN 1kΩ LOW-PASS FILTER 52.3Ω VOCM 1kΩ 100Ω 475Ω ADA4940-1/ ADA4940-2 54.9Ω 2:1 50Ω DUAL FILTER HP LP CT 475Ω 54.9Ω 25.5Ω –2.5V 1kΩ Figure 60. Test Circuit for Distortion Measurements Rev.
PAGE 22
Data Sheet ADA4940-1/ADA4940-2 TERMINOLOGY Common-Mode Offset Voltage DEFINITION OF TERMS The common-mode offset voltage is defined as the difference between the voltage applied to the VOCM terminal and the common mode of the output voltage. –FB RF +DIN RG +IN –OUT ADA4840-1/ ADA4940-2 +VOCM –DIN RG –IN VOS, cm = VOUT, cm − VOCM – Differential VOS, Differential CMRR, and VOCM CMRR RL, dm VOUT, dm + +OUT 08452-090 RF +FB Figure 61.
PAGE 23
ADA4940-1/ADA4940-2 Data Sheet THEORY OF OPERATION The ADA4940-1/ADA4940-2 are high speed, low power differential amplifiers fabricated on Analog Devices advanced dielectrically isolated SiGe bipolar process. They provide two closely balanced differential outputs in response to either differential or single-ended input signals. An external feedback network that is similar to a voltage feedback operational amplifier sets the differential gain.
PAGE 24
Data Sheet ADA4940-1/ADA4940-2 APPLICATIONS INFORMATION VnRG1 ANALYZING AN APPLICATION CIRCUIT The ADA4940-1/ADA4940-2 use open-loop gain and negative feedback to force their differential and common-mode output voltages in such a way as to minimize the differential and commonmode error voltages. The differential error voltage is defined as the voltage between the differential inputs labeled +IN and −IN (see Figure 61). For most purposes, this voltage can be assumed to be zero.
PAGE 25
ADA4940-1/ADA4940-2 Data Sheet Table 15 and Table 16 list several common gain settings, recommended resistor values, input impedances, and output noise density for both balanced and unbalanced input configurations. Table 15. Differential Ground-Referenced Input, DC-Coupled, RL = 1 kΩ (See Figure 64) Nominal Gain (dB) 0 6 10 14 RF (Ω) 1000 1000 1000 1000 RG (Ω) 1000 500 318 196 RIN, dm (Ω) 2000 1000 636 392 Differential Output Noise Density (nV/√Hz) 11.3 15.4 20.0 27.7 RTI (nV/√Hz) 11.3 7.7 6.8 5.
PAGE 26
ADA4940-1/ADA4940-2 Terminating a Single-Ended Input RS This section describes how to properly terminate a single-ended input to the ADA4940-1/ADA4940-2 with a gain of 1, RF = 1 kΩ and RG = 1 kΩ. An example using an input source with a terminated output voltage of 1 V p-p and source resistance of 50 Ω illustrates the three steps that must be followed. Because the terminated output voltage of the source is 1 V p-p, the open-circuit output voltage of the source is 2 V p-p.
PAGE 27
ADA4940-1/ADA4940-2 Data Sheet INPUT AND OUTPUT CAPACITIVE AC COUPLING AMPLIFIER BIAS CURRENT DISABLE 08452-063 Although the ADA4940-1/ADA4940-2 is best suited to dccoupled applications, it is nonetheless possible to use it in accoupled circuits. Input ac coupling capacitors can be inserted between the source and RG. This ac coupling blocks the flow of the dc common-mode feedback current and causes the ADA4940-1/ADA4940-2 dc input common-mode voltage to equal the dc output common-mode voltage.
PAGE 28
Data Sheet ADA4940-1/ADA4940-2 The total system power in Figure 73 is under 35 mW. A large portion of that power is the current coming from supplies to the output, which is set at 2.5 V, going back to the input through the feedback and gain resistors. To reduce that power to 25 mW, increase the value of the feedback and gain resistor from 1 kΩ to 2 kΩ and set the value of the resistors R5 and R6 to 3 kΩ.
PAGE 29
ADA4940-1/ADA4940-2 Data Sheet LAYOUT, GROUNDING, AND BYPASSING As a high speed device, the ADA4940-1/ADA4940-2 are sensitive to the PCB environment in which they operate. Realizing their superior performance requires attention to the details of high speed PCB design. Bypass the power supply pins as close to the device as possible and directly to a nearby ground plane. Use high frequency ceramic chip capacitors. Use two parallel bypass capacitors (1000 pF and 0.1 μF) for each supply.
PAGE 30
Data Sheet ADA4940-1/ADA4940-2 OUTLINE DIMENSIONS 3.00 BSC SQ 0.60 MAX 13 16 12 (BOTTOM VIEW) 1 0.45 2.75 BSC SQ TOP VIEW 0.80 MAX 0.65 TYP 12° MAX SEATING PLANE 9 8 5 4 0.25 MIN 1.50 REF FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 0.05 MAX 0.02 NOM 0.30 0.23 0.18 1.30 SQ 1.15 EXPOSED PAD 0.50 BSC 1.00 0.85 0.80 PIN 1 INDICATOR *1.45 0.20 REF 072208-A PIN 1 INDICATOR 0.50 0.40 0.
PAGE 31
ADA4940-1/ADA4940-2 Data Sheet 4.10 4.00 SQ 3.90 PIN 1 INDICATOR 0.30 0.25 0.18 0.50 BSC PIN 1 INDICATOR 24 19 18 1 EXPOSED PAD TOP VIEW 0.80 0.75 0.70 0.50 0.40 0.30 13 12 2.65 2.50 SQ 2.45 6 7 0.25 MIN BOTTOM VIEW 0.05 MAX 0.02 NOM FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 04-12-2012-A COPLANARITY 0.08 0.20 REF SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-220-WGGD. Figure 79.
PAGE 32
Data Sheet ADA4940-1/ADA4940-2 NOTES Rev.
PAGE 33
ADA4940-1/ADA4940-2 Data Sheet NOTES ©2011–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08452-0-9/13(C) Rev.