Datasheet

Ultrafast SiGe
ECL Clock/Data Buffers
ADCLK905/ADCLK907/ADCLK925
Rev. 0
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FEATURES
95 ps propagation delay
7.5 GHz toggle rate
60 ps typical output rise/fall
60 fs random jitter (RJ)
On-chip terminations at both input pins
Extended industrial temperature range: −40°C to +125°C
2.5 V to 3.3 V power supply (V
CC
− V
EE
)
APPLICATIONS
Clock and data signal restoration and level shifting
Automated test equipment (ATE)
High speed instrumentation
High speed line receivers
Threshold detection
Converter clocking
GENERAL DESCRIPTION
The ADCLK905 (one input, one output), ADCLK907 (dual one
input, one output), and ADCLK925 (one input, two outputs) are
ultrafast clock/data buffers fabricated on the Analog Devices, Inc.,
proprietary XFCB3 silicon germanium (SiGe) bipolar process.
The ADCLK905/ADCLK907/ADCLK925 feature full-swing
emitter coupled logic (ECL) output drivers. For PECL (positive
ECL) operation, bias V
CC
to the positive supply and V
EE
to ground.
For NECL (negative ECL) operation, bias V
CC
to ground and
V
EE
to the negative supply.
The buffers offer 95 ps propagation delay, 7.5 GHz toggle rate,
10 Gbps data rate, and 60 fs random jitter (RJ).
The inputs have center tapped, 100 Ω, on-chip termination
resistors. A V
REF
pin is available for biasing ac-coupled inputs.
The ECL output stages are designed to directly drive 800 mV
each side into 50 Ω terminated to V
CC
− 2 V for a total
differential output swing of 1.6 V.
The ADCLK905/ADCLK907/ADCLK925 are available in
16-lead LFCSP packages.
TYPICAL APPLICATION CIRCUITS
D
D
Q
V
CC
V
EE
V
T
Q
V
REF
06318-001
Figure 1. ADCLK905 ECL 1:1 Clock/Data Buffer
D1
D1
Q1
V
CC
V
EE
V
T
1
Q1
V
REF
1
D2
Q2
V
CC
V
EE
V
T
2
D2
V
REF
2
Q2
06318-002
Figure 2. ADCLK907 ECL Dual 1:1 Clock/Data Buffer
D
D
V
CC
V
EE
V
T
V
REF
Q1
Q1
Q2
Q2
06318-003
Figure 3. ADCLK925 ECL 1:2 Clock/Data Fanout Buffer