Datasheet

ADCLK950
Rev. A | Page 11 of 12
INPUT TERMINATION OPTIONS
V
REF
x
V
CC
V
T
x
CLKx
CLKx
CONNECT V
T
xTOV
CC
.
50Ω50Ω
08279-019
ADCLK950
Figure 19. DC-Coupled CML Input Termination
0
8279-020
V
REF
x
V
T
x
V
CC
50Ω50Ω
CLKx
CLKx
0.01µF
(OPTIONAL)
50Ω
ADCLK950
Figure 20. DC-Coupled LVPECL Input Termination
V
REF
x
V
T
x
CONNECT V
T
xTOV
REF
x.
ADCLK950
50Ω50Ω
CLKx
CLKx
08279-021
Figure 21. AC-Coupled Input Termination, Such as LVDS and LVPECL
V
REF
x
V
T
x
CONNECT V
T
x, V
REF
x, AND CLKx. PLACE A
BYPASS CAPACITOR FROM V
T
x TO GROUND.
A
LTERNATIVELY, V
T
x, V
REF
x, AND CLKx CAN BE
CONNECTED, GIVING A CLEANER LAYOUT AND
A
180º PHASE SHIFT.
50Ω50Ω
CLKx
CLKx
08279-022
ADCLK950
Figure 22. AC-Coupled Single-Ended Input Termination
V
REF
x
V
T
x
50Ω50Ω
CLKx
CLKx
08279-023
ADCLK950
Figure 23. DC-Coupled 3.3 V CMOS Input Termination