Datasheet

Data Sheet ADE5166/ADE5169/ADE5566/ADE5569
Rev. D | Page 123 of 156
Table 128. RTC Configuration SFR (TIMECON, Address 0xA1)
Bit Mnemonic Default Description
7 Reserved N/A Reserved.
6 ALFLAG 0 Alarm flag. This bit is set when the RTC registers match the enabled alarm registers. It can be cleared by
the user to indicate that the alarm has been serviced.
[5:4] ITS1, ITS0 0 INTVAL timebase select bits.
ITS1, ITS0 Timebase
00 1/128 sec
01
Second
10 Minute
11 Hour
3 SIT 0 Interval timer one-time alarm.
SIT Result
0 The ITFLAG flag is set after INTVAL counts, and then another interval count starts
1 The ITFLAG flag is set after one time interval
2 ITFLAG 0 Interval timer flag. This bit is set when the configured time interval has elapsed. It can be cleared by the
user to indicate that the alarm event has been serviced.
1 ITEN 0 Interval timer enable.
ITEN Result
0 The interval timer is disabled, and the 8-bit interval timer counter is reset
1 Set this bit to 1 to enable the interval timer
0 Unused N/A Unused.
Table 129. RTC Configuration 2 SFR (TIMECON2, Address 0xA2)
Bit Mnemonic Default Description
[7:5] Reserved N/A Reserved.
4 ALDAT_EN 0 Alarm date enable. When this bit is set, the data in the AL_DATE register (Address 0x0E) is compared to
the data in the RTC DATE register (Address 0x06). If the two values match, and any other enabled RTC
alarms also match, the ALFLAG in the TIMECON SFR (Address 0xA1[6]) is set. If enabled, an RTC interrupt occurs.
3 ALDAY_EN 0 Alarm day enable. When this bit is set, the data in the AL_DAY register (Address 0x0D) is compared to the
data in the RTC DAY register (Address 0x05). If the two values match and any other enabled RTC alarms
also match, the ALFLAG in the TIMECON SFR (Address 0xA1[6]) is set. If enabled, an RTC interrupt occurs.
2 ALHR_EN 0 Alarm hour enable. When this bit is set, the data in the AL_HOUR register (Address 0x0C) is compared to
the data in the RTC HOUR register (Address 0x04). If the two values match and any other enabled RTC
alarms also match, the ALFLAG in the TIMECON SFR (Address 0xA1[6]) is set. If enabled, an RTC interrupt occurs.
1 ALMIN_EN 0 Alarm minute enable. When set, the data in the AL_MIN register (Address 0x0B) is compared to the data in
the RTC MIN register (Address 0x03). If the two values match and any other enabled RTC alarms also
match, the ALFLAG in the TIMECON SFR (Address 0xA1[6]) is set. If enabled, an RTC interrupt occurs.
0
ALSEC_EN
0
Alarm second enable. When this bit is set, the data in the AL_SEC register (Address 0x0A) is compared to
the data in the RTC SEC register (Address 0x02). If the two values match and any other enabled RTC alarms
also match, the ALFLAG in the TIMECON SFR (Address 0xA1[6]) is set. If enabled, an RTC interrupt occurs.