Datasheet
Data Sheet ADE5166/ADE5169/ADE5566/ADE5569
Rev. D | Page 17 of 156
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
64
V
DCIN
63
DGND
62
V
INTD
61
V
SWOUT
60
V
DD
59
V
INTA
58
V
BAT
57
REF
IN/OUT
56
I
PB
55
RESET
54
AGND
53
I
N
52
I
PA
51
EA
50
V
N
49
V
P
47
XTAL1
46
XTAL2
45
BCTRL/INT1/P0.0
42
P0.3/CF2
43
P0.2/CF1
44
SDEN/P2.3/TxD2
48
INT0
41
P0.4/MOSI/SDATA
40
P0.5/MISO/ZX
39
P0.6/SCLK/T0
37
P1.0/RxD
36
P1.1/TxD
35
FP0
34
FP1
33
FP2
38
P0.7/SS/T1/RxD2
2
COM2/FP28
3
COM1
4
COM0
7
P1.4/T2/FP23
6
P1.3/T2EX/FP24
5
P1.2/FP25/ZX
1
COM3/FP27
8
P1.5/FP22
9
P1.6/FP21
10
P1.7/FP20
12
P2.0/FP18
13
P2.1/FP17
14
P2.2/FP16
15
LCDVC
16
LCDVP2
11
P0.1/FP19
17
LCDVB
18
LCDVA
19
LCDVP1
20
FP15
21
FP14
22
FP13
23
FP12
24
FP11
25
FP10
26
FP9
27
FP8
28
FP7
29
FP6
30
FP5
31
FP4
32
FP3
PIN 1
ADE5166/ADE5169
TOP VIEW
(Not to Scale)
07411-010
Figure 9. ADE5166/ADE5169 Pin Configuration
Table 13. Pin Function Descriptions
Pin No. Mnemonic Description
1 COM3/FP27 Common Output 3/LCD Segment Output 27. COM3 is used for the LCD backplane.
2 COM2/FP28 Common Output 2/LCD Segment Output 28. COM2 is used for the LCD backplane.
3 COM1 Common Output 1. COM1 is used for the LCD backplane.
4
COM0
Common Output 0. COM0 is used for the LCD backplane.
5 P1.2/FP25/ZX General-Purpose Digital I/O Port 1.2/LCD Segment Output 25/ZX Output.
6 P1.3/T2EX/FP24 General-Purpose Digital I/O Port 1.3/Timer 2 Control Input/LCD Segment Output 24.
7 P1.4/T2/FP23 General-Purpose Digital I/O Port 1.4/Timer 2 Input/LCD Segment Output 23.
8 P1.5/FP22 General-Purpose Digital I/O Port 1.5/LCD Segment Output 22.
9
P1.6/FP21
General-Purpose Digital I/O Port 1.6/LCD Segment Output 21.
10 P1.7/FP20 General-Purpose Digital I/O Port 1.7/LCD Segment Output 20.
11 P0.1/FP19 General-Purpose Digital I/O Port 0.1/LCD Segment Output 19.
12 P2.0/FP18 General-Purpose Digital I/O Port 2.0/LCD Segment Output 18.
13 P2.1/FP17 General-Purpose Digital I/O Port 2.1/LCD Segment Output 17.
14 P2.2/FP16 General-Purpose Digital I/O Port 2.2/LCD Segment Output 16.
15 LCDVC Output Port for LCD Levels. This pin should be decoupled with a 470 nF capacitor.
16 LCDVP2 Analog Output. A 100 nF capacitor should be connected between this pin and LCDVP1 for the internal LCD
charge pump device.
17, 18 LCDVB, LCDVA Output Ports for LCD Levels. These pins should be decoupled with a 470 nF capacitor.
19 LCDVP1 Analog Output. A 100 nF capacitor should be connected between this pin and LCDVP2 for the internal LCD
charge pump device.
20 to 35 FP15 to FP0 LCD Segment Output 15 to LCD Segment Output 0.
36 P1.1/TxD General-Purpose Digital I/O Port 1.1/Transmitter Data Output (Asynchronous).
37 P1.0/RxD General-Purpose Digital I/O Port 1.0/Receive Data Input (Asynchronous).
38 P0.7/
SS
/T1/RxD2 General-Purpose Digital I/O Port 0.7/Slave Select When SPI Is in Slave Mode/Timer 1 Input/Receive Data
Input 2 (Asynchronous).
39
P0.6/SCLK/T0
General-Purpose Digital I/O Port 0.6/Clock Output for I
2
C or SPI Port/Timer 0 Input.
40 P0.5/MISO/ZX General-Purpose Digital I/O Port 0.5/Data Input for SPI Port/ZX Output.
41 P0.4/MOSI/SDATA General-Purpose Digital I/O Port 0.4/Data Output for SPI Port/I
2
C-Compatible Data Line.