Datasheet

ADE5166/ADE5169/ADE5566/ADE5569 Data Sheet
Rev. D | Page 28 of 156
POWER MANAGEMENT
The ADE5166/ADE5169/ADE5566/ADE5569 have elaborate
power management circuitry that manages the regular power
supply to battery switchover and power supply failures.
The power management functionalities can be accessed directly
through the 8052 power management SFRs (see Table 16).
Table 16. Power Management SFRs
SFR Address R/W Mnemonic Description
0xEC R/W IPSME Power management interrupt enable (see Table 21).
0xF5 R/W BATPR Battery switchover configuration (see Table 19).
0xF8 R/W IPSMF Power management interrupt flag (see Table 18).
0xFF R/W INTPR Interrupt pins configuration (see Table 17).
0xF4 R/W PERIPH Peripheral configuration (see Table 20).
0xC5
R/W
POWCON
Power control (see Table 26).
0xFB R/W SCRATCH1 Scratch Pad 1 (see Table 22).
0xFC R/W SCRATCH2 Scratch Pad 2 (see Table 23).
0xFD R/W SCRATCH3 Scratch Pad 3 (see Table 24).
0xFE R/W SCRATCH4 Scratch Pad 4 (see Table 25).
POWER MANAGEMENT REGISTER DETAILS
Table 17. Interrupt Pins Configuration SFR (INTPR, Address 0xFF)
Bit Mnemonic Default Description
[7:4] Reserved N/A Reserved.
[3:1] INT1PRG 000 Controls the function of
INT1
.
INT1PRG Result
X00
1
GPIO enabled
X01
1
BCTRL enabled
01X
1
INT1
input disabled
11X
1
INT1
input enabled
0 INT0PRG 0 Controls the function of
INT0
.
INT0PRG Result
0
INT0
input disabled
1
INT0
input enabled
1
X = don’t care
Writing to the Interrupt Pins Configuration SFR (INTPR, Address 0xFF)
To protect the RTC from runaway code, a key must be written to the key SFR (KYREG, Address 0xC1) to obtain write access to the
INTPR SFR. The KYREG SFR (see Table 126) should be set to 0xEA to unlock the INTPR SFR and reset to 0 after a timekeeping register is
written to. The RTC registers can be written using the following 8052 assembly code:
MOV KYREG, #0EAh
MOV INTPR, #080h