Datasheet

ADE5166/ADE5169/ADE5566/ADE5569 Data Sheet
Rev. D | Page 66 of 156
Reactive Power Gain Calibration
Figure 72 shows the signal processing chain for the ADE5169/
ADE5569 reactive power calculation. As explained in the Reactive
Power Calculation (ADE5169/ADE5569) section, the reactive
power is calculated by applying a low-pass filter to the instanta-
neous reactive power signal. Note that, when reading the waveform
samples from the output of LPF2, the gain of the reactive energy
can be adjusted by using the multiplier and by writing a twos
complement, 12-bit word to the var gain register (VARGAIN,
Address 0x1E[11:0]). Equation 23 shows how the gain adjust-
ment is related to the contents of the var gain register.
Output VARGAIN =












+×
12
2
1
VARGAIN
PowerReactive
(23)
The resolution of the VARGAIN register is the same as the
WGAIN register (Address 0x1D) (see the Active Power Gain
Calibration section). VARGAIN can be used to calibrate the
reactive power (or energy) calculation in the ADE5169/ADE5569.
Reactive Power Offset Calibration
The ADE5169/ADE5569 also incorporate a reactive power offset
register (VAROS, Address 0x21). This is a signed, twos comple-
ment, 16-bit register that can be used to remove offsets in the
reactive power calculation (see Figure 72). An offset can exist in
the reactive power calculation due to crosstalk between channels
on the PCB or in the IC itself. The offset calibration allows the
contents of the reactive power register to be maintained at 0 when
no power is being consumed.
The 256 LSBs (VAROS = 0x0100) written to the reactive power
offset register are equivalent to 1 LSB in the WAVMODE register
(Address 0x0D).
Sign of Reactive Power Calculation
Note that the average reactive power is a signed calculation.
The phase shift filter has −90° phase shift when the integrator
is enabled and +90° phase shift when the integrator is disabled.
Table 47 summarizes the relationship of the phase difference
between the voltage and the current and the sign of the resulting
var calculation.
Table 47. Sign of Reactive Power Calculation
Angle Integrator Sign
0° to +90°
Off Positive
−90° to 0°
Off Negative
0° to +90°
On Positive
−90° to 0°
On Negative
Reactive Power Sign Detection
The ADE5169/ADE5569 detect a change of sign in the reactive
power. The VARSIGN flag (Bit 4) in the Interrupt Status 1 SFR
(MIRQSTL, Address 0xDC) records when a change of sign has
occurred according to the VARSIGN bit (Bit 5) in the ACCMODE
register (Address 0x0F). If the VARSIGN bit (Bit 4) is set in the
Interrupt Enable 1 SFR (MIRQENL, Address 0xD9), the 8052 core
has a pending ADE interrupt. The ADE interrupt stays active until
the VARSIGN status bit is cleared (see the Energy Measurement
Interrupts section).
When the VA RSIG N bit (Bit 5) in the ACCMODE register
(Address 0x0F) is cleared (default), a transition from positive to
negative reactive power sets the VARSIGN flag (Bit 4) in the
Interrupt Status 1 SFR (MIRQSTL, Address 0xDC).
When VARSIGN in the ACCMODE register (Address 0x0F)
is set, a transition from negative to positive reactive power sets
the VARSIGN flag in the Interrupt Status 1 SFR (MIRQSTL,
Address 0xDC).
Reactive Power No Load Detection
The ADE5169/ADE5569 include a no load threshold feature on the
reactive power that eliminates any creep effects in the meter. The
ADE5169/ADE5569 accomplish this by not accumulating reactive
energy when the multiplier output is below the no load threshold.
When the reactive power is below the no load threshold, the
RNOLOAD flag (Bit 1) in the Interrupt Status 1 SFR (MIRQSTL,
Address 0xDC) is set. If the RNOLOAD bit (Bit 1) is set in the
Interrupt Enable 1 SFR (MIRQENL, Address 0xD9), the 8052
core has a pending ADE interrupt. The ADE interrupt stays
active until the RNOLOAD status bit is cleared (see the Energy
Measurement Interrupts section).
The no load threshold level can be selected by setting the
VARNOLOAD bits (Bits[3:2])in the NLMODE register
(Address 0x0E). Setting these bits to 0b00 disables the no load
detection, and setting them to 0b01, 0b10, or 0b11 sets the no
load detection threshold to 0.015%, 0.0075%, and 0.0037% of
the full-scale output frequency of the multiplier, respectively.