Datasheet

Data Sheet ADE5166/ADE5169/ADE5566/ADE5569
Rev. D | Page 89 of 156
Mnemonic Description Bytes Cycles
Branching
JMP @A+DPTR Jump indirect relative to DPTR 1 3
RET Return from subroutine 1 4
RETI Return from interrupt 1 4
ACALL addr11
Absolute jump to subroutine
2
3
AJMP addr11 Absolute jump unconditional 2 3
SJMP rel Short jump (relative address) 2 3
JC rel Jump on carry equal to 1 2 3
JNC rel Jump on carry = 0 2 3
JZ rel Jump on accumulator = 0 2 3
JNZ rel Jump on accumulator ≠ 0 2 3
DJNZ Rn, rel Decrement register, JNZ relative 2 3
LJMP Long jump unconditional 3 4
LCALL addr16 Long jump to subroutine 3 4
JB bit, rel Jump on direct bit = 1 3 4
JNB bit, rel Jump on direct bit = 0 3 4
JBC bit, rel Jump on direct bit = 1 and clear 3 4
CJNE A, dir, rel Compare A, direct JNE relative 3 4
CJNE A, #data, rel Compare A, immediate JNE relative 3 4
CJNE Rn, #data, rel Compare register, immediate JNE relative 3 4
CJNE @Ri, #data, rel Compare indirect, immediate JNE relative 3 4
DJNZ dir, rel
Decrement direct byte, JNZ relative
3
4
Miscellaneous
NOP No operation 1 1
READ-MODIFY-WRITE INSTRUCTIONS
Some 8052 instructions read the latch and others read the pin.
The state of the pin is read for instructions that input a port bit.
Instructions that read the latch rather than the pins are the ones
that read a value, possibly change it, and rewrite it to the latch.
Because these instructions involve modifying the port, it is
assumed that the pins being modified are outputs, so the output
state of the pin is read from the latch. This prevents a possible
misinterpretation of the voltage level of a pin. For example, if a
port pin is used to drive the base of a transistor, a 1 is written to
the bit to turn on the transistor. If the CPU reads the same port
bit at the pin rather than the latch, it reads the base voltage of
the transistor and interprets it as Logic 0. Reading the latch
rather than the pin returns the correct value of 1.
The instructions that read the latch rather than the pins are called
read-modify-write instructions and are listed in Table 69. When
the destination operand is a port or a port bit, these instructions
read the latch rather than the pin.
Table 69. Read-Modify-Write Instructions
Instruction Example Description
ANL ANL P0, A Logic AND
ORL ORL P1, A Logic OR
XRL XRL P2, A Logic XOR
JBC JBC P1.1, LABEL Jump if Bit = 1 and clear bit
CPL CPL P2.0 Complement bit
INC
INC P2
Increment
DEC DEC P2 Decrement
DJNZ DJNZ P0, LABEL Decrement and jump if not zero
MOV PX.Y, C
1
MOV P0.0, C Move carry to Bit Y of Port X
CLR PX.Y
1
CLR P0.0 Clear Bit Y of Port X
SETB PX.Y
1
SETB P0.0 Set Bit Y of Port X
1
These instructions read the port byte (all eight bits), modify the addressed
bit, and write the new byte back to the latch.