Datasheet

Data Sheet ADE5166/ADE5169/ADE5566/ADE5569
Rev. D | Page 97 of 156
INTERRUPT VECTORS
When an interrupt occurs, the program counter is pushed onto the
stack, and the corresponding interrupt vector address is loaded
into the program counter. When the interrupt service routine is
complete, the program counter is popped off the stack by a RETI
instruction. This allows program execution to resume from where
it was interrupted. The interrupt vector addresses are shown in
Table 87.
Table 87. Interrupt Vector Addresses
Source Vector Address
IE0 0x0003
TF0 0x000B
IE1 0x0013
TF1 0x001B
RI + TI 0x0023
TF2 + EXF2 0x002B
ITEMP (Temperature ADC)
0x0033
ISPI/I2CI 0x003B
IPSM (Power Supply) 0x0043
IADE (Energy Measurement DSP) 0x004B
IRTC (RTC Interval Timer) 0x0053
WDT (Watchdog Timer) 0x005B
RI2 + TI2 0x0063
INTERRUPT LATENCY
The 8052 architecture requires that at least one instruction
execute between interrupts. To ensure this, the 8052 MCU
core hardware prevents the program counter from jumping to
an interrupt service routine (ISR) immediately after completing
a RETI instruction or an access of the IP and IE SFRs.
The shortest interrupt latency is 3.25 instruction cycles, 800 ns
with a clock of 4.096 MHz. The longest interrupt latency for a
high priority interrupt results when a pending interrupt is gen-
erated during a low priority interrupt RETI, followed by a multiply
instruction. This results in a maximum interrupt latency of 16.25
instruction cycles, 4 µs with a clock of 4.096 MHz.
CONTEXT SAVING
When the 8052 vectors to an interrupt, only the program counter
is saved on the stack. Therefore, the interrupt service routine must
be written to ensure that registers used in the main program are
restored to their pre-interrupt state. Common SFRs that can be
modified in the ISR are the accumulator register and the PSW
register. Any general-purpose registers that are used as scratch
pads in the ISR should also be restored before exiting the
interrupt. The following example 8052 code shows how to
restore some commonly used registers:
GeneralISR:
; save the current accumulator value
PUSH ACC
; save the current status and register bank
selection
PUSH PSW
; service interrupt
; restore the status and register bank
selection
POP PSW
; restore the accumulator
POP ACC
RETI