Datasheet

REV. 0
ADE7754
–31–
Table VII. Communications Register
Bit Bit
Location Mnemonic Description
0 to 5 A0 to A5 The six LSBs of the communications register specify the register for the data transfer operation.
Table VIII lists the address of each ADE7754 on-chip register.
6 RESERVED This bit is unused and should be set to 0.
7W/R When this bit is a Logic 1, the data transfer operation immediately following the write to the com-
munications register will be interpreted as a write to the ADE7754. When this bit is a Logic 0, the
data transfer operation immediately following the write to the communications register will be
interpreted as a read operation.
W/R
DB7
0
DB6
A5
DB5
A4
DB4
A3
DB3
A2
DB2
A1
DB1
A0
DB0
ACCESSING THE ADE7754 ON-CHIP REGISTERS
All ADE7754 functionality is accessed via the on-chip registers.
Each register is accessed by first writing to the communications
register, then transferring the register data. For a full description
of the serial interface protocol, see the Serial Interface section.
Communications Register
The communications register is an 8-bit, write-only register that
controls the serial data transfer between the ADE7754 and the
host processor. All data transfer operations must begin with a
write to the communications register. The data written to the
communications register determines whether the next operation
is a read or a write and which register is being accessed. Table VII
outlines the bit designations for the communications register.