Datasheet

REV. 0
ADE7754
–33–
Table VIII. Register List (continued)
Address Default
[A5:A0] Name R/W* Length Value Description
13h LINCYC R/W 16 FFFFh
Line Cycle Register. The content of this register sets the number of half line
cycles while the active energy and the apparent energy are accumulated in the
LAENERGY and LVAENERGY registers. See the Energy Calculation section.
14h SAGCYC R/W 8 FFh SAG Line Cycle Register. This register specifies the number of consecutive half
l
ine cycles where voltage channel input falls below a threshold level. This regis-
ter is common to the three-line voltage SAG detection. The detection threshold
i
s specified by SAGLVL register. See the Line Voltage SAG Detection section.
15h SAGLVL R/W 8 0 SAG Voltage Level. This register specifies the detection threshold for
SAG event. This register is common to the three-line voltage SAG
detection. See the description of SAGCYC register for details.
16h VPEAK R/W 8 FFh Voltage Peak Level. This register sets the level of the voltage peak
detection. If the selected voltage phase exceeds this level, the PKV flag
in the status register is set. See Table XII.
17h IPEAK R/W 8 FFh
Current Peak Level. This register sets the level of the current peak detec-
tion. If the selected current phase exceeds this level, the PKI flag in the
status register is set. See Table XII.
18h GAIN R/W 8 0 PGA Gain Register. This register is used to adjust the gain selection for
the PGA in current and voltage channels. See the Analog Inputs section
and Table X. This register is also used to configure the active energy
accumulation no-load threshold and sum of absolute values.
19h AWG R/W 12 0
Phase A Active Power Gain Register. The active power caluation for Phase A
can be calibrated by writing to this register. The calibration range is 50%
of the nominal full-scale active power. The resolution of the gain adjust is
0.0244%/LSB.
1Ah BWG R/W 12 0 Phase B Active Power Gain.
1Bh CWG R/W 12 0 Phase C Active Power Gain.
1Ch AVAG R/W 12 0 VA Gain Register. This register calculation can be calibrated by writing
this register. The calibration range is 50% of the nominal full-scale real
power. The resolution of the gain adjust is 0.02444%/LSB.
1Dh BVAG R/W 12 0 Phase B VA Gain.
1Eh CVAG R/W 12 0 Phase C VA Gain.
1Fh APHCAL R/W 5 0 Phase A Phase Calibration Register.
20h BPHCAL R/W 5 0 Phase B Phase Calibration Register.
21h CPHCAL R/W 5 0 Phase C Phase Calibration Register.
22h AAPOS R/W 12 0 Phase A Power Offset Calibration Register.
23h BAPOS R/W 12 0 Phase B Power Offset Calibration Register.
24h CAPOS R/W 12 0 Phase C Power Offset Calibration Register.
25h CFNUM R/W 12 0h CF Scaling Numerator Register. The content of this register is used in
the numerator of CF output scaling.
26h CFDEN R/W 12 3Fh CF Scaling Denominator Register. The content of this register is used in
the denominator of CF output scaling.
27h WDIV R/W 8 0 Active Energy Register Divider.
28h VADIV R/W 8 0 Apparent Energy Register Divider.
29h AIrms R 24 0 Phase A Current Channel RMS Register. The register contains the rms
component of one input of the current channel. The source is selected
by data bits in the mode register.
2Ah BIrms R 24 0 Phase B Current Channel RMS Register.
2Bh CIrms R 24 0 Phase C Current Channel RMS Register.
2Ch AVrms R 24 0 Phase A Voltage Channel RMS Register.
2Dh BVrms R 24 0 Phase B Voltage Channel RMS Register.
2Eh CVrms R 24 0 Phase C Voltage Channel RMS Register.
2Fh AIrmsOS R/W 12 0 Phase A Current RMS Offset Correction Register.
30h BIrmsOS R/W 12 0 Phase B Current RMS Offset Correction Register.