Datasheet
Table Of Contents
- FEATURES
- GENERAL DESCRIPTION
- FUNCTIONAL BLOCK DIAGRAM
- SPECIFICATIONS
- TIMING CHARACTERISTICS
- ABSOLUTE MAXIMUM RATINGS
- ORDERING GUIDE
- PIN CONFIGURATION
- PIN FUNCTION DESCRIPTIONS
- Typical Performance Characteristics
- TERMINOLOGY
- POWER SUPPLY MONITOR
- ANALOG INPUTS
- ANALOG-TO-DIGITAL CONVERSION
- CURRENT CHANNEL ADC
- VOLTAGE CHANNEL ADC
- ZERO-CROSSING DETECTION
- PERIOD MEASUREMENT
- LINE VOLTAGE SAG DETECTION
- PEAK DETECTION
- TEMPERATURE MEASUREMENT
- PHASE COMPENSATION
- ROOT MEAN SQUARE MEASUREMENT
- ACTIVE POWER CALCULATION
- TOTAL ACTIVE POWER CALCULATION
- ENERGY CALCULATION
- LINE ENERGY ACCUMULATION
- REACTIVE POWER CALCULATION
- TOTAL REACTIVE POWER CALCULATION
- APPARENT POWER CALCULATION
- TOTAL APPARENT POWER CALCULATION
- APPARENT ENERGY CALCULATION
- LINE APPARENT ENERGY ACCUMULATION
- ENERGIES SCALING
- CHECK SUM REGISTER
- SERIAL INTERFACE
- INTERRUPTS
- ACCESSING THE ADE7754 ON-CHIP REGISTERS
- OUTLINE DIMENSIONS
REV. 0–38–
ADE7754
Watt Mode Register (0Dh)
The phases involved in the active energy measurement of the ADE7754 are defined by writing to the WATMODE register. Table XIV
summarizes the functionality of each bit in the WATMODE register.
Table XIV. WATMODE Register
Bit Bit Default
Location Mnemonic Value Description
0-2 LWATSEL 7 These bits are used to select each part of the formula separately, depending on the line active
energy measurement method. The behavior of these bits is the same as WATSEL bits. Bit 2
selects the first term of the formula and so on.
3-5 WATSEL 7 These bits are used to select each part of the formula separately, depending on the active
energy measurement method. These bits are also used to enable the negative power detection
available in Bits 12 to 14 of CFNUM register. See Table XI. Setting Bit 5 to Logic 1 selects
the first term of the formula (VA IA or VA (IA – IB)). Setting Bit 4 to Logic 1 selects the
second term of the formula (VB IB or 0 depending on WATMOD configuration). Setting
Bit 3 to Logic 1 selects the last term of the formula (VC IC or VC (IC – IB)). Any combi-
nation of these bits can address calibration and operational needs.
6-7 WATM 0 These bits are used to select the formula used for active energy calculation.
WATM1 WAVM0 Active Energy Calculation
00VA IA + VB IB + VC IC
01VA (IA – IB) + 0 + VC (IC – IB)
10VA (IA – IB) + 0 + VC IC
11Reserved.
VA Mode Register (0Eh)
The phases involved in the apparent energy measurement of the ADE7754 are defined by writing to the VAMODE register. Table XV
summarizes the functionality of each bit in the VAMODE register.
Table XV. VAMODE Register
Bit Bit Default
Location Mnemonic Value Description
0-2 LVASEL 7 These bits are used to select each part of the formula separately, depending on the line appar-
ent energy measurement method. The behavior of these bits is the same as VASEL bits. Bit 2
selects the first term of the formula, and so on.
3-5 VASEL 7 These bits are used to select separately each part of the formula, depending on the apparent
energy measurement method. Setting Bit 5 to Logic 1 selects the first term of the formula
(VA
rms
IA
rms
). Setting Bit 4 to Logic 1 selects the second term of the formula (VB
rms
IB
rms
or (VA
rms
+VC
rms
)/2 IB
rms
or VA
rms
IB
rms
depending on VAMOD configuration). Setting
Bit 3 to Logic 1 selects the first term of the formula (VC
rms
IC
rms
). Any combination of these
bits can address calibration and operational needs.
6-7 VAMOD 0 These bits are used to select the formula used for active energy calculation.
VAMOD1 VAMOD0 Apparent Energy Calculation
00VA
rms
IA
rms
+ VB
rms
IB
rms
+ VC
rms
IC
rms
01VA
rms
IA
rms
+ (VA
rms
+ VC
rms
)/2 IB
rms
+ VC
rms
IC
rms
10VA
rms
IA
rms
+ VA
rms
IB
rms
+ VC
rms
IC
rms
11Reserved.