Datasheet

Data Sheet ADE7854/ADE7858/ADE7868/ADE7878
Rev. G | Page 25 of 100
Table 11. Power Modes and Related Characteristics
Power Mode All Registers
1
LPOILVL,
CONFIG2 I
2
C/SPI Functionality
PSM0
State After Hardware Reset Set to default Set to default I
2
C enabled All circuits are active and DSP
is in idle mode.
State After Software Reset Set to default Unchanged Active serial port is unchanged if lock-in
procedure has been previously executed
All circuits are active and DSP
is in idle mode.
PSM1—ADE7878, ADE7868 Only Not available Values set
during PSM0
unchanged
Enabled Current mean absolute values
are computed and the results
are stored in the AIMAV,
BIMAV, and CIMAV registers.
The I
2
C or SPI serial port is
enabled with limited
functionality.
PSM2—ADE7878, ADE7868 Only Not available Values set
during PSM0
unchanged
Disabled Compares phase currents
against the threshold set in
LPOILVL. Triggers
IRQ0
or
IRQ1
pins accordingly. The serial
ports are not available.
PSM3 Not available Values set
during PSM0
unchanged
Disabled Internal circuits shut down
and the serial ports are not
available.
1
Setting for all registers except the LPOILVL and CONFIG2 registers.
Table 12. Recommended Actions When Changing Power Modes
Initial Power
Mode
Recommended Actions
Before Setting Next
Power Mode
Next Power Mode
PSM0 PSM1 PSM2 PSM3
PSM0 Stop DSP by setting the run
register = 0x0000.
Current mean absolute
values (mav) computed
immediately.
Wait until the
IRQ0
or
IRQ1
pin is triggered
accordingly.
No action
necessary.
Disable HSDC by clearing Bit 6
(HSDEN) to 0 in the CONFIG
register.
xIMAV registers can be
accessed immediately.
Mask interrupts by setting
MASK0 = 0x0 and
MASK1 = 0x0.
Erase interrupt status flags in
the STATUS0 and STATUS1
registers.
PSM1—
ADE7878,
ADE7868 Only
No action necessary.
Wait until the
IRQ1
pin is
triggered low.
Wait until the
IRQ0
or
IRQ1
pin is triggered
accordingly.
No action
necessary.
Poll the STATUS1 register
until Bit 15 (RSTDONE) is
set to 1.
PSM2—
ADE7878,
ADE7868 Only
No action necessary.
Wait until the
IRQ1
pin is
triggered low.
Wait until the
IRQ1
pin
triggered low.
No action
necessary.
Poll the STATUS1 register
until Bit 15 (RSTDONE) is
set to 1.
Current mean absolute
values compute at this
moment.
xIMAV registers may be
accessed from this
moment.
PSM3 No action necessary.
Wait until the
IRQ1
pin is
triggered low.
Wait until the
IRQ1
pin is
triggered low.
Wait until the
IRQ0
or
IRQ1
pin is triggered
accordingly.
Poll the STATUS1 register
until Bit 15 (RSTDONE) is
set to 1.
Current mav circuit begins
computations at this time.
xIMAV registers can be
accessed from this
moment.