Datasheet

Data Sheet ADE7854/ADE7858/ADE7868/ADE7878
Rev. G | Page 45 of 100
Current RMS Offset Compensation
The ADE7854/ADE7858/ADE7868/ADE7878 incorporate a
current rms offset compensation register for each phase:
AIRMSOS, BIRMSOS, CIRMSOS registers, and the NIRMSOS
register for ADE7868 and ADE7878 only. These are 24-bit
signed registers that are used to remove offsets in the current
rms calculations. An offset can exist in the rms calculation due
to input noises that are integrated in the dc component of I
2
(t).
The current rms offset register is multiplied by 128 and added
to the squared current rms before the square root is executed.
Assuming that the maximum value from the current rms
calculation is 4,191,910 with full-scale ac inputs (50 Hz), one LSB of
the current rms offset represents 0.00037% ((
1284191
2
+
/4191
− 1) × 100) of the rms measurement at 60 dB down from full
scale. Conduct offset calibration at low current; avoid using
currents equal to zero for this purpose.
IRMSOSrmsIrmsI ×+= 128
2
0
(14)
where I rms
0
is the rms measurement without offset correction.
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE78xx work on 32-, 16-, or 8-bit words
and the DSP works on 28 bits. Similar to the register presented
in Figure 35, the AIRMSOS, BIRMSOS, CIRMSOS, and
NIRMSOS (ADE7868/ADE7878 only) 24-bit signed registers
are accessed as 32-bit registers with four MSBs padded with 0s
and sign extended to 28 bits.
Current Mean Absolute Value Calculation—ADE7868
and ADE7878 Only
This section presents the second approach to estimate the rms
values of all phase currents using the mean absolute value (mav)
method. This approach is used in PSM1 mode, which is available
to the ADE7868 and ADE7878 only, to allow energy accumu-
lation based on current rms values when the missing neutral
case demonstrates to be a tamper attack. This datapath is active
also in PSM0 mode to allow for its gain calibration. The gain is
used in the external microprocessor during PSM1 mode. The
mav value of the neutral current is not computed using this
method. Figure 60 shows the details of the signal processing
chain for the mav calculation on one of the phases of the current
channel.
CURRENT SIGNAL
COMING FROM ADC
xIMAV[23:0]
HPF LPF
|X|
08510-251
Figure 60. Current MAV Signal Processing for PSM1 Mode
The current channel mav value is processed from the samples
used in the current channel waveform sampling mode. The
samples are passed through a high-pass filter to eliminate the
eventual dc offsets introduced by the ADCs and the absolute
values are computed. The outputs of this block are then filtered
to obtain the average. The current mav values are unsigned 20-bit
values and they are stored in the AIMAV, BIMAV, and CIMAV
registers. The update rate of this mav measurement is 8 kHz.
207000
207500
208000
208500
209000
209500
210000
210500
211000
211500
212000
45
50
55
FREQUENCY (Hz)
LSB
60
65
08510-252
Figure 61. xIMAV Register Values at Full Scale, 45 Hz to 65 Hz Line
Frequencies
The mav values of full-scale sinusoidal signals of 50 Hz and
60 Hz are 209,686 and 210,921, respectively. As seen in Figure 61,
there is a 1.25% variation between the mav estimate at 45 Hz
and the one at 65 Hz for full-scale sinusoidal inputs. The accuracy
of the current mav is typically 0.5% error from the full-scale
input down to 1/100 of the full-scale input. Additionally, this
measurement has a bandwidth of 2 kHz. The settling time for
the current mav measurement, that is the time it takes for the
mav register to reflect the value at the input to the current
channel within 0.5% error, is 500 ms. However, during the first
measurement after entering this mode, it takes a longer time to
settle to the correct value.
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7868/ADE7878 work on 32-, 16-, or
8-bit words. As presented in Figure 62, the AIMAV, BIMAV, and
CIMAV 20-bit unsigned registers are accessed as 32-bit registers
with the 12 MSBs padded with 0s.
31 20 19 0
20-BIT UNSIGNED NUMBER0000 0000 0000
08510-253
Figure 62. xIMAV Registers Transmitted as 32-Bit Registers
Current MAV Gain and Offset Compensation
The current rms values stored in the AIMAV, BIMAV, and
CIMAV registers can be calibrated using gain and offset
coefficients corresponding to each phase. It is recommended to
calculate the gains in PSM0 mode by supplying the ADE7868/
ADE7878 with nominal currents. The offsets can be estimated
by supplying the ADE7868/ADE7878 with low currents, usually
equal to the minimum value at which the accuracy is required.
Every time the external microcontroller reads the AIMAV,
BIMAV, and CIMAV registers, it uses these coefficients stored
in its memory to correct them.
Voltage Channel RMS Calculation
Figure 63 shows the detail of the signal processing chain for the
rms calculation on one of the phases of the voltage channel. The
voltage channel rms value is processed from the samples used in
the voltage channel. The voltage rms values are signed 24-bit