Datasheet

Data Sheet ADE7854/ADE7858/ADE7868/ADE7878
Rev. G | Page 5 of 100
FUNCTIONAL BLOCK DIAGRAMS
PGA1 PGA1 PGA1
PGA3 PGA3 PGA3
1.2V
REF
DIGITAL SIGNAL
PROCESSOR
APHCAL
HPFDIS
[23:0]
HPF
HPFDIS
[23:0]
DIGITAL
INTEGRATOR
HPF
POR LDO LDO
X
2
AIRMS
LPF
AIRMSOS
X
2
AVRMS
LPF
LPF
AVRMSOS
AVAGAIN
AWGAIN
DFC
CF1DEN
:
DFC
CF2DEN
:
DFC
CF3DEN
:
52426
25174
7 8 9
22 12 13 14 19 18
39 37 38 36 32 29 35 34 33
3 2
27 28 23
6
SPI
OR
I
2
C/HSDC
RESET
REF
IN/OUT
VDD AGND AVDD DVDD DGND
CLKIN
CLKOUT
IAP
IAN
VAP
IBP
IBN
VBP
ICP
ICN
VCP
VN
PM0 PM1 CF1 CF2 CF3/HSCLK IRQ0 IRQ1 SCLK/SCL MOSI/SDA MISO/HSD SS/HSA
ADE7854
ADC ADC ADC ADC ADC ADC
08510-204
TOTAL ACTIVE/APPARENT
ENERGIES AND VOLTAGE/
CURRENT RMS CALCULATION FOR
PHASE C
(SEE PHASE A FOR DETAILED
DATA PATH)
TOTAL ACTIVE/APPARENT
ENERGIES AND VOLTAGE/
CURRENT RMS CALCULATION FOR
PHASE B
(SEE PHASE A FOR DETAILED
DATA PATH)
PHASE A, PHASE B,
AND
PHASE C
DATA
AWATTOS
AVGAIN
AIGAIN
Figure 1. ADE7854 Functional Block Diagram