Datasheet

Data Sheet ADE7854/ADE7858/ADE7868/ADE7878
Rev. G | Page 53 of 100
Note that q(t) can be rewritten as
∑
∞
=
=
1
)(
k
kk
IVtq
{cos(φ
k
− γ
k
−
2
π
) − cos(2 kωt + φ
k
+ γ
k
+
2
π
)} +
∑
∞
≠
=
mk
mk
m
k
IV
1,
{cos[(k – m)ωt + φ
k
− γ
k
−
2
π
]−
cos
[(k + m)ωt + φ
k
+ γ
k
+
2
π
]} (32)
The average total reactive power over an integral number of line
cycles (n) is given by the expression in Equation 33.
( )
∫
∑
∞
=
==
nT
k
kk
IVdttq
nT
Q
0
1
1
cos(φ
k
– γ
k
−
2
π
) (33)
∑
∞
=
=
1k
k
k
I
VQ
sin(φ
k
– γ
k
)
where:
T is the period of the line cycle.
Q is referred to as the total reactive power. Note that the total
reactive power is equal to the dc component of the instantaneous
reactive power signal q(t) in Equation 32, that is,
∑
∞
=1
k
kk
IV
sin(φ
k
– γ
k
)
This is the relationship used to calculate the total reactive power
in the ADE7858/ADE7868/ADE7878 for each phase. The
instantaneous reactive power signal, q(t), is generated by multi-
plying each harmonic of the voltage signals by the 90° phase-
shifted corresponding harmonic of the current in each phase.
The ADE7858/ADE7868/ADE7878 store the instantaneous
total phase reactive powers into the AVAR , BVA R, and CVAR
registers. Their expression is
∑
∞
=
××=
1k
FS
k
FS
k
I
I
V
V
xVAR
sin(φ
k
– γ
k
) × PMAX ×
4
2
1
(34)
where:
V
FS
, I
FS
are the rms values of the phase voltage and current when
the ADC inputs are at full scale.
PMAX = 33,516,139, the instantaneous power computed when
the ADC inputs are at full scale and in phase.
The xVAR waveform registers can be accessed using various
serial ports. Refer to the Waveform Sampling Mode section for
more details.
The expression of fundamental reactive power is obtained from
Equation 33 with k = 1, as follows:
FQ = V
1
I
1
sin(φ
1
– γ
1
)
The ADE7878 computes the fundamental reactive power using
a proprietary algorithm that requires some initialization function
of the frequency of the network and its nominal voltage measured
in the voltage channel. These initializations are introduced in
the Active Power Calculation section and are common for both
fundamental active and reactive powers.
Table 17 presents the settling time for the fundamental reactive
power measurement, which is the time it takes the power to
reflect the value at the input of the ADE7878.
Table 17. Settling Time for Fundamental Reactive Power
Input Signals
63% Full Scale 100% Full Scale
375 ms 875 ms
Reactive Power Gain Calibration
The average reactive power in each phase can be scaled by
±100% by writing to one of the phase’s VAR gain 24-bit registers
(AVARGAIN, BVARGAIN, CVARGAIN, AFVARGAIN,
BFVARGAIN, or CFVARGAIN). The xVARGAIN registers are
placed in each phase of the total reactive power datapath. The
xFVARGAIN registers are placed in each phase of the fundamental
reactive power datapath. The xVA R GAIN registers are twos com-
plement signed registers and have a resolution of 2
−23
/LSB. The
function of the xVARGAIN registers is expressed by






+×
=
23
2
12
gisterRexVARGAIN
OutputLPF
PowerReactiveAverage
(35)
The output is scaled by –50% by writing 0xC00000 to the
xVARGAIN registers and increased by +50% by writing
0x400000 to them. These registers can be used to calibrate the
reactive power (or energy) gain in the ADE78xx for each phase.
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7858/ADE7868/ADE7878 work on 32-,
16-, or 8-bit words and the DSP works on 28 bits. Similar to
registers presented in Figure 35, the AVARGAIN, BVARGAIN,
CVARGAIN, AFVARGAIN, BFVARGAIN, and CFVARGAIN
24-bit signed registers are accessed as 32-bit registers with the
four MSBs padded with 0s and sign extended to 28 bits.
Reactive Power Offset Calibration
The ADE7858/ADE7868/ADE7878 provide a reactive power
offset register on each phase and on each reactive power. AVAROS,
BVA RO S , and CVAROS registers compensate the offsets in the
total reactive power calculations, whereas AFVAROS, BFVAROS,
and CFVAROS registers compensate offsets in the fundamental
reactive power calculations. These are signed twos complement,
24-bit registers that are used to remove offsets in the reactive
power calculations. An offset can exist in the power calculation
due to crosstalk between channels on the PCB or in the chip
itself. The offset resolution of the registers is the same as for the
active power offset registers (see the Active Power Offset
Calibration section).
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7858/ADE7868/ADE7878 work on 32-,
16-, or 8-bit words and the DSP works on 28 bits. Similar to the
registers presented in Figure 35, the AVAROS, BVAROS, and
CVA ROS 24-bit signed registers are accessed as 32-bit registers
with the four MSBs padded with 0s and sign extended to 28 bits.