Datasheet

ADE7854/ADE7858/ADE7868/ADE7878 Data Sheet

Rev. G | Page 72 of 100

SPI Write Operation

The write operation using the SPI interface of the ADE78xx

initiates when the master sets the

/HSA pin low and begins

sending one byte representing the address of the ADE7854/

ADE7858/ADE7868/ADE7878 on the MOSI line. The master

sets data on the MOSI line starting with the first high-to-low

transition of SCLK. The SPI of the ADE78xx samples data on

the low-to-high transitions of SCLK. The most significant seven

bits of the address byte can have any value, but as a good pro-

gramming practice, they should be different from 0111000b, the

seven bits used in the I

C protocol. Bit 0 (read/

write

) of the

address byte must be 0 for a write operation. Next, the master

sends both the 16-bit address of the register that is written and

the 32-, 16-, or 8-bit value of that register without losing any

SCLK cycle. After the last bit is transmitted, the master sets the

and SCLK lines high at the end of the SCLK cycle and the

communication ends. The data lines, MOSI and MISO, go into

a high impedance state. See Figure 90 for details of the SPI write

operation.

15 14

SCLK

MOSI

103130 10

00 0 0000

08510-063

Figure 90. SPI Write Operation of a 32-Bit Register